Chapter 3 Scan Path Block
Scan D-Latch with D-F/F Function
Chapter 3 Scan Path Block
Switching speed
Function
Block
type
Input
Output
Path
→
t LD0 (ns)
t 1
Standard type
Q output
Block type
IN
SCK
OUT
MIN.
TYP. MAX.
MIN.
0.011
0.010
0.011
0.010
0.011
0.010
0.010
0.011
0.011
0.010
0.011
0.010
TYP. MAX. Symbol Fanin Symbol Fanout
Normal
Name cells Name cells
QB output
Name cells Name cells
(HH) 0.625
(HL) 0.607
(HH) 0.484
(HL) 0.535
(HH) 0.522
1.029
0.964
0.752
0.866
0.857
0.921
0.692
0.705
1.023
0.968
0.755
0.860
2.007
1.810
1.405
1.663
1.678
1.822
1.331
1.410
2.002
1.821
1.415
1.658
2.050
1.860
1.220
0.480
0.000
0.090
2.474
2.466
0.015
0.013
0.015
0.013
0.015
0.013
0.013
0.015
0.015
0.013
0.015
0.013
0.021
0.017
0.021
0.017
0.021
0.017
0.017
0.021
0.021
0.017
0.021
0.017
SIN
SCK
SMC
D
1.0
1.0
1.0
1.0
1.0
Q
35
34
S202
→
→
→
→
→
→
Q
Drivability
Name cells
Name cells
QB
SCK
D
QB
Q
x1
x2
x4
x8
S202
12
G
(LL)
0.530
(HL) 0.430
(LH) 0.405
(HH) 0.618
(HL) 0.610
(HH) 0.487
(HL) 0.527
D
QB
Q
Logic Diagram for "Normal"
Truth Table for "Normal"
G
G
QB
SIN
SCK
SMC
D
G
Q
A
QB
AB
SIN H01
SCK H02
SMC H03
N01
Q
Set up time
Set up time
Set up time
Hold time
Hold time
Hold time
Min Pulse
Min Pulse
SIN
SMC
D
SIN
SMC
D
SCK
G
0.470
0.960
0.620
0.460
0.000
0.270
0.912
0.912
A
X
X
X
X
0
X
X
B
X
1
X
X
1
0
1
0
1
Hold
D
G
H04
H05
X
X
1
B
X
BB
X
N02 QB
1
Latch
Down
←
Prohibition
X:Irrelevant
Logic Diagram for "Q output"
Truth Table for "Q output"
Logic Diagram for "QB output"
Truth Table for "QB output"
Block Library A13872EJ5V0BL
3 - 24
Block Library A13872EJ5V0BL
3 - 25
ETC [ ETC ]
