Chapter 2 Function Block
Chapter 2 Function Block
Switching speed
Function
2 to 4 Decoder
Block
type
Input
Output
Path
→
t LD0 (ns)
t 1
Positive output type
Negative output type
with ENB
Block type
IN
OUT
MIN.
TYP. MAX.
MIN.
0.020
0.038
0.038
0.020
0.020
0.038
0.038
0.020
0.020
0.038
0.020
0.038
0.038
0.020
0.038
0.020
0.010
0.011
0.011
0.010
0.010
0.011
0.011
0.010
0.010
0.011
0.010
0.011
0.011
0.010
0.011
0.010
0.022
0.030
0.030
0.022
0.022
0.030
0.030
0.022
0.022
0.029
0.022
0.029
0.029
0.022
0.029
0.022
0.011
0.010
0.010
0.011
0.011
0.010
0.010
0.011
TYP. MAX. Symbol Fanin Symbol Fanout
Normal
with ENB
with EN
Normal
Name cells
with EN
(HL) 0.273
(LH) 0.261
(HH) 0.193
0.419
0.420
0.288
0.285
0.421
0.424
0.288
0.285
0.444
0.437
0.444
0.437
0.302
0.309
0.298
0.307
0.392
0.450
0.590
0.537
0.399
0.457
0.585
0.532
0.432
0.441
0.436
0.446
0.576
0.575
0.569
0.569
0.257
0.311
0.441
0.392
0.257
0.310
0.437
0.389
0.279
0.285
0.281
0.289
0.425
0.419
0.426
0.418
0.514
0.634
0.496
0.378
0.514
0.634
0.496
0.378
0.730
0.771
0.488
0.507
0.733
0.777
0.488
0.507
0.781
0.834
0.781
0.834
0.550
0.556
0.544
0.552
0.685
0.876
1.111
0.990
0.694
0.887
1.102
0.984
0.725
0.817
0.731
0.825
1.046
1.028
1.035
1.019
0.431
0.585
0.809
0.721
0.431
0.585
0.805
0.718
0.452
0.509
0.455
0.514
0.744
0.749
0.744
0.749
0.919
1.171
0.882
0.692
0.919
1.171
0.882
0.692
0.025
0.053
0.053
0.025
0.025
0.053
0.053
0.025
0.025
0.053
0.025
0.053
0.053
0.025
0.053
0.025
0.012
0.015
0.016
0.012
0.012
0.015
0.015
0.012
0.012
0.015
0.013
0.016
0.015
0.013
0.015
0.012
0.030
0.041
0.041
0.030
0.030
0.041
0.041
0.030
0.030
0.040
0.030
0.040
0.040
0.029
0.040
0.029
0.015
0.013
0.013
0.015
0.015
0.013
0.013
0.015
0.033
0.077
0.077
0.034
0.033
0.077
0.077
0.034
0.034
0.077
0.034
0.077
0.077
0.034
0.077
0.034
0.017
0.022
0.022
0.017
0.017
0.022
0.022
0.017
0.017
0.022
0.017
0.022
0.022
0.017
0.022
0.017
0.042
0.062
0.062
0.042
0.042
0.062
0.062
0.042
0.042
0.062
0.042
0.061
0.061
0.042
0.061
0.042
0.021
0.018
0.018
0.021
0.021
0.018
0.018
0.021
A
B
1.0
1.0
Y0
Y1
Y2
Y3
8
8
8
8
L560
F560
L561
F561
A
A
A
A
B
B
B
B
A
A
A
A
B
B
B
B
A
A
A
A
B
B
B
B
A
A
A
A
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
Y0
Drivability
Name cells
Name cells
Name cells
Name cells
Name cells
Y1
Low Power
L560
F560
6
L561
F561
6
(LL)
0.182
10
10
x1
x2
x4
(HL) 0.275
(LH) 0.264
(HH) 0.193
Y2
Y3
(LL)
0.182
Logic Diagram
(HL) 0.291
(LH) 0.268
(HL) 0.291
(LH) 0.268
(HH) 0.196
Y0
for "Positive output type"
for "Positive output with ENB"
for "Positive output with EN"
Y1
A
B
H01
H02
N01 Y0
Y2
N02 Y1
N03 Y2
N04 Y3
(LL)
(HH) 0.193
(LL) 0.196
0.198
Y3
(HL) 0.258
(LH) 0.276
(HH) 0.372
A
B
1.0
1.0
Y0
Y1
Y2
Y3
34
34
34
34
Y0
Y1
(LL)
0.334
(HL) 0.263
(LH) 0.281
(HH) 0.368
Y2
Y3
(LL)
0.330
(HL) 0.291
(LH) 0.280
(HL) 0.294
(LH) 0.283
(HH) 0.375
Y0
for "Negative output type"
for "Negative output with ENB"
for "Negative output with EN"
Y1
A
B
H01
H02
N01 Y0B
N02 Y1B
N03 Y2B
N04 Y3B
Y2
(LL)
(HH) 0.370
(LL) 0.359
(HH) 0.175
(LL) 0.194
0.364
Y3
A
B
1.0
1.0
Y0B
Y1B
Y2B
Y3B
13
13
13
13
Y0B
Y1B
Y2B
Y3B
Y0B
Y1B
Y2B
Y3B
Y0B
Y1B
Y2B
Y3B
(HL) 0.283
(LH) 0.244
(HH) 0.175
(LL)
0.194
(HL) 0.280
(LH) 0.242
(HH) 0.192
Truth Table
A
(LL)
(HH) 0.194
(LL) 0.188
0.186
B
ENB
Y0
Y1
Y2
Y3
Y0B
Y1B
Y2B
Y3B
0
1
0
1
X
0
0
1
1
X
0
0
0
0
1
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
1
1
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
0
1
(HL) 0.283
(LH) 0.266
(HL) 0.282
(LH) 0.265
(HH) 0.332
A
B
1.0
1.0
Y0B
Y1B
Y2B
Y3B
35
35
35
35
(LL)
0.391
(HL) 0.320
(LH) 0.238
(HH) 0.332
0.391
(HL) 0.320
(LH) 0.237
X:Irrelevant
(LL)
Block Library A13872EJ5V0BL
2 - 202
Block Library A13872EJ5V0BL
2 - 203
ETC [ ETC ]
