Chapter 2 Function Block
3-Input Exclusive OR
Chapter 2 Function Block
Switching speed
Function
Block
type
Input
Output
Path
→
t LD0 (ns)
t 1
Standard type
Block type
IN
OUT
MIN.
TYP. MAX.
MIN.
0.021
0.020
0.021
0.020
0.021
0.020
0.021
0.020
0.021
0.020
0.021
0.021
0.011
0.010
0.011
0.010
0.011
0.010
0.011
0.010
0.011
0.010
0.011
0.011
TYP. MAX. Symbol Fanin Symbol Fanout
Normal
High speed
(HH) 0.428
(HL) 0.370
(LH) 0.332
0.720
0.584
0.586
0.784
0.529
0.588
0.560
0.560
0.361
0.524
0.469
0.413
0.743
0.628
0.625
0.797
0.552
0.607
0.581
0.592
0.372
0.535
0.478
0.420
1.409
1.082
1.164
1.537
0.985
1.108
1.097
1.072
0.650
0.982
0.907
0.782
1.453
1.156
1.234
1.566
1.035
1.147
1.141
1.134
0.675
1.006
0.932
0.802
0.029
0.026
0.030
0.026
0.030
0.026
0.030
0.026
0.030
0.026
0.030
0.026
0.015
0.013
0.015
0.013
0.015
0.013
0.015
0.013
0.015
0.013
0.015
0.014
0.042
0.035
0.042
0.036
0.042
0.036
0.042
0.035
0.042
0.036
0.042
0.036
0.022
0.018
0.022
0.019
0.022
0.019
0.022
0.019
0.022
0.019
0.022
0.019
A
B
C
1.0
1.0
1.0
Y
16
L516
A
B
C
A
B
C
→
→
→
→
→
→
Y
Y
Y
Y
Y
Y
Drivability
Name cells
Name cells
L516
F516
6
7
Low Power
x1
(LL)
0.445
(HH) 0.326
(HL) 0.351
(LH) 0.319
x2
x4
(LL)
0.330
(HH) 0.237
(HL) 0.318
(LH) 0.278
Logic Diagram
A
B
C
H01
(LL)
0.251
H02
H03
N01
Y
(HH) 0.442
(HL) 0.400
(LH) 0.357
A
B
C
1.0
1.0
1.0
Y
34
F516
(LL)
0.451
(HH) 0.341
(HL) 0.361
(LH) 0.333
(LL)
0.344
(HH) 0.245
(HL) 0.323
(LH) 0.283
(LL)
0.255
Truth Table
A
B
C
Y
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
Block Library A13872EJ5V0BL
2 - 176
Block Library A13872EJ5V0BL
2 - 177
ETC [ ETC ]
