Chapter 2 Function Block
Chapter 2 Function Block
Switching speed
JK-F/F
Function
Block
type
Input
Output
Path
→
t LD0 (ns)
t 1
Standard type
Low Gate type
Block type
IN
OUT
MIN.
TYP. MAX.
MIN.
0.011
0.010
0.011
0.010
TYP. MAX. Symbol Fanin Symbol Fanout
Normal
Q output
QB output
Normal
Q output
QB output
(HH) 0.357
(HL) 0.398
(HH) 0.534
(HL) 0.534
0.680
0.550
0.647
0.876
0.845
0.991
1.202
1.663
1.535
1.360
1.480
0.000
0.000
2.032
0.980
0.944
1.470
1.300
0.000
0.000
1.352
0.980
0.944
1.300
1.470
0.000
0.000
1.352
0.015
0.013
0.015
0.013
0.021
0.017
0.021
0.018
J
K
C
1.0
1.0
1.0
Q
35
34
F771
C
C
→
Q
Drivability
Name cells
Name cells
Name cells
Name cells
Name cells
Name cells
QB
→
QB
Low Power
F771
10
F771NQ
9
F771NB
9
x1
x2
x4
Set up time
Set up time
Hold time
Hold time
Min Pulse
J
K
J
K
C
0.660
0.200
0.250
0.719
Logic Diagram for "Normal"
Truth Table for "Normal"
(HH) 0.326
(HL) 0.332
0.690
0.525
0.530
0.011
0.011
0.015
0.014
0.022
0.020
J
K
C
1.0
1.0
1.0
Q
33
33
F771NQ
F771NB
C
→
Q
J
K
C
Q
QB
J
C
K
H01
H03
H02
N01
Q
Set up time
Set up time
Hold time
Hold time
Min Pulse
J
K
J
K
C
0.660
0.180
0.200
0.518
0
0
1
1
X
0
1
0
1
X
Hold
0
1
1
0
N02 QB
(HH) 0.326
(HL) 0.332
0.660
0.525
0.530
0.011
0.011
0.015
0.014
0.022
0.020
J
K
C
1.0
1.0
1.0
QB
C
→
QB
Invert
Hold
Set up time
Set up time
Hold time
Hold time
Min Pulse
J
K
J
K
C
0.660
0.200
0.250
0.518
X:Irrelevant
Logic Diagram for "Q output"
Truth Table for "Q output"
J
K
C
Q
J
C
K
H01
H03
H02
N01
Q
0
0
1
1
X
0
1
0
1
X
Hold
0
1
Invert
Hold
X:Irrelevant
Logic Diagram for "QB output"
Truth Table for "QB output"
J
K
C
QB
J
C
K
H01
H03
H02
0
0
1
1
X
0
1
0
1
X
Hold
1
0
N01 QB
Invert
Hold
X:Irrelevant
Block Library A13872EJ5V0BL
2 - 338
Block Library A13872EJ5V0BL
2 - 339
ETC [ ETC ]
