Chapter 2 Function Block
Chapter 2 Function Block
Switching speed
3-Input NOR
Function
Block
type
Input
Output
Path
→
t LD0 (ns)
t 1
-
Block type
Drivability
Low Power
x1
Normal
with 1 inverter with 2 inverter with 3 inverter with 4 inverter
IN
OUT
MIN.
TYP. MAX.
MIN.
0.020
0.058
0.020
0.058
0.020
0.059
0.011
0.029
0.010
0.029
0.010
0.029
0.005
0.015
0.005
0.015
0.005
0.015
TYP. MAX. Symbol Fanin Symbol Fanout
Name cells
Name cells
Name cells
Name cells
Name cells
(HL) 0.089
(LH) 0.117
(HL) 0.102
(LH) 0.121
(HL) 0.110
(LH) 0.126
(HL) 0.083
(LH) 0.106
(HL) 0.093
(LH) 0.116
(HL) 0.084
(LH) 0.106
(HL) 0.096
(LH) 0.138
(HL) 0.100
(LH) 0.137
(HL) 0.096
(LH) 0.139
0.126
0.165
0.143
0.199
0.155
0.256
0.118
0.162
0.134
0.199
0.118
0.164
0.139
0.228
0.145
0.215
0.139
0.228
0.175
0.215
0.207
0.374
0.213
0.548
0.151
0.256
0.178
0.406
0.150
0.258
0.189
0.396
0.207
0.391
0.189
0.397
0.024
0.081
0.024
0.082
0.025
0.082
0.013
0.041
0.013
0.041
0.013
0.041
0.006
0.021
0.006
0.021
0.006
0.021
0.032
0.118
0.033
0.118
0.035
0.119
0.017
0.059
0.018
0.060
0.017
0.059
0.009
0.030
0.008
0.030
0.009
0.030
A
B
C
1.0
1.0
1.0
Y
Y
Y
4
10
17
L203
F203
F223
A
B
C
A
B
C
A
B
C
→
→
→
→
→
→
→
→
→
Y
Y
Y
Y
Y
Y
Y
Y
Y
L203
2
F203
F223
3
6
x2
x4
A
B
C
2.1
2.1
2.1
x8
Block type
Normal
with 1 inverter with 2 inverter with 3 inverter with 4 inverter
-
cells
Drivability
Name
Name cells
Name cells
Name cells
Name cells
Low Power
x1
x2
x4
x8
A
B
C
4.4
4.2
4.3
Logic Diagram for "Normal"
Logic Diagram for "with 1 inverter"
Logic Diagram for "with 2 inverter"
A
B
C
H01
H02
H03
N01
Y
Logic Diagram for "with 3 inverter"
Logic Diagram for "with 4 inverter"
Block Library A13872EJ5V0BL
2 - 24
Block Library A13872EJ5V0BL
2 - 25
ETC [ ETC ]
