TPS61040
TPS61041
SLVS413 – FEBRUARY 2002
APPLICATION INFORMATION
D1
L1
V
O
C
FF
R1
V
V
IN
SW
FB
IN
C
O
C
IN
R2
EN
GND
Figure 15. Layout Diagram
L1
10 µH
D1
V
18 V
OUT
V
IN
1.8 V to 6 V
TPS61040
C
FF
22 pF
R1
2.2 MΩ
V
SW
FB
IN
C2
1 µF
C1
L1:
D1:
C1:
C2:
Sumida CR32–100
Motorola MBR0530
Tayo Yuden JMK212BY475MG
Tayo Yuden TMK316BJ105KL
4.7 µF
EN
GND
R2
160 kΩ
Figure 16. LCD Bias Supply
L1
10 µH
D1
V
18 V
O
TPS61040
C
FF
22 pF
R1
2.2 MΩ
V
V
IN
SW
FB
IN
C2
1 µF
1.8 V to 6 V
C1
DAC or Analog Voltage
0 V –18 V
1.233 V = 25 V
4.7 µF
EN
GND
R2
160 kΩ
L1:
Sumida CR32-100
D1:
C1:
C2:
Motorola MBR0530
Tayo Yuden JMK212BY475MG
Tayo Yuden GMK316BJ105KL
Figure 17. LCD Bias Supply With Adjustable Output Voltage
15
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