Appendix D Port States in the Different Processing States
Table D-1 Port States Overview
Port
P17 to P10 High-
impedance
P27 to P20 High-
impedance
P37 to P30 High-
impedance*2
P43 to P40 High-
impedance
P57 to P50 High-
impedance
P67 to P60 High-
impedance
P77 to P70 High-
impedance
P87 to P80 High-
impedance
P97 to P90 High-
impedance
PA3 to PA0 High-
impedance
PB7 to PB0 High-
Reset
Sleep
Subsleep
Standby
Watch
Subactive
Active
Retained
Retained
High-
impedance*1
Retained
Functions
Functions
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
High-
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
High-
High-
impedance
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
High-
Functions
Functions
Functions
Functions
Functions
Functions
Functions
Functions
Functions
High-
Functions
Functions
Functions
Functions
Functions
Functions
Functions
Functions
Functions
High-
High-
impedance*1
High-
impedance
High-
impedance*1
High-
impedance
High-
impedance
High-
impedance
High-
impedance
High-
impedance
High-
impedance impedance impedance impedance impedance impedance impedance
PC3 to PC0 High- High- High- High- High- High- High-
impedance impedance impedance impedance impedance impedance impedance
Notes: 1. High level output when MOS pull-up is in on state.
2. Reset output from P32 pin only.
499
ETC [ ETC ]
