Start
Sets bits SPC31 and
SPC32 to 1 in SPCR
Read bit TDRE
in SSR
1. Read the serial status register (SSR)
and check that bit TDRE is set to 1,
1
then set bit MPBT in SSR to 0 or 1 and
write transmit data to the transmit data
register (TDR). When data is written to
TDR, bit TDRE is cleared to 0 automatically.
No
TDRE = 1?
Yes
2. When continuing data transmission, be
sure to read TDRE = 1 to confirm that a
write can be performed before writing data
to TDR. When data is written to TDR, bit
TDRE is cleared to 0 automatically.
Set bit MPDT
in SSR
3. If a break is to be output when data
transmission ends, set the port PCR to 1
and clear the port PDR to 0, then clear bit
TE in SCR3 to 0.
Write transmit
data to TDR
Yes
Continue data
transmission?
2
No
Read bit TEND
in SSR
No
No
TEND = 1?
Yes
3
Break output?
Yes
Set PDR = 0,
PCR = 1
Clear bit TE to
0 in SCR3
End
Figure 10-22 Example of Multiprocessor Data Transmission Flowchart
313
ETC [ ETC ]
