PRELIMINARY
PCT1789W DATA SHEET
PCT789T-A PIN DESCRIPTION
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Table 3 PCT789T-A Pin Description (Continued)
Typ
e
Name
Numbers I/O
Description
OCS*
49
67
O
I
4mA Chip select for companion chip. Any base I/O access to the PCT789T-A
is direct to the companion chip also, if any, through this pin.
IXIRQ
PU External IRQ input. The interrupt request from the companion chip can
be routed through this input to the host bus.
IMCLKIN,
OMCLKOUT
42,
43
I
O
Terminals to connect to external crystal. These pins are the two termi-
nals of the on-chip oscillator circuit to which a quartz crystal should be
attached to provide the fundamental clock for generating oversampling
clock for the AFE. The recommended frequency of the quartz crystal is
18.432MHz with ± 50ppm frequency tolerance at room temperature.
OMCLK
OUT[4]
48
47
O
O
4mA Master clock. This pin provides the master clock to drive external AFE.
4mA General-purpose output bit 4. In normal operating mode, this pin
PU reflects bit 4 of the external output register.
OUT[5]
OUT[6]
OUT[7]
46
45
44
O
O
O
4mA General-purpose output bit 5. In normal operating mode, this pin
PU reflects bit 5 of the external output register.
4mA General-purpose output bit 6. In normal operating mode, this pin
PU reflects bit 6 of the external output register.
4mA General-purpose output bit 7. In normal operating mode, this pin
PU reflects bit 7 of the external output register.
VAUXDET
54
I
I
PD Auxiliary power detection. Detects the presence of 3.3Vaux.
IMODE[2:0]
65-63
PU Operating mode selection. These input pins are used for setting the
operation mode of the PCT789T-A.
ISVID[3:0]
IDID[2:0]
62-59
58-56
I
PD Subsystem vendor ID selection. These input pins are used for selecting
one of the 16 preselected subsystem vendor IDs to be initialized into
PCI Configuration register 2Ch at power-up. Refer to the PCI configura-
tion register definition section for a detailed list.
I
PD Device ID selection. The logic state of these input pins is latched into
bits [2:0] of the PCI device ID field in PCI Configuration register 00h dur-
ing the power-on reset period. It is used for product differentiation.
Serial EEPROM Interface Signals
OEEPCK
OEEPCS
BEEPD
52
53
51
O
4mA EEPROM Clock. For providing clock signal for accessing off-chip serial
EEPROM which stored the resource information of a PCI card.
O
4mA EEPROM Chip Select. Provides the chip enable signal for the external
serial EEPROM.
I/O 4mA EEPROM Data I/O. Provides the serial data gateway for the external
serial EEPROM.
Power and Ground Pins
DVDD
16, 38, 68,
85
P
Positive digital power supply (3.3V ± 5%)
Digital ground (0V)
DVSS
9, 21, 41,
39, 50, 69,
95
G
PRELIMINARY
PC-TEL, Inc.
12
1789W0DOCDAT06A-0299
ETC [ ETC ]
