PCT2303N DATA SHEET
CONTROL REGISTERS
!!
Line 2 DAC/ADC Level
(Register 48h, R/W)
Mute
Reserved
DAC[3:1]
R
Mute
Reserved
ADC[3:1]
R
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset settings = 8080h
This read/write register controls the modem AFE DAC and ADC levels. The default value after cold register reset
for this register (8080h) corresponds to 0 dB DAC attenuation with mute on and 0 dB ADC gain with mute on.
Bit Definitions:
Bits
Name
Description
15
Mute
Transmit mute. 1 = Mute on.
Reserved.
14:12
11:9
Reserved
DAC[3:1]
Analog transmit attenuation.
DAC[3:1]
000
Description
0dB attenuation.
3dB attenuation.
6dB attenuation.
9dB attenuation.
12dB attenuation.
001
010
011
1xx
8
Reserved
Mute
Reserved.
7
Receive mute. 1 = Mute on.
Reserved.
6:4
3:1
Reserved
ADC[3:1]
Analog receive gain.
ADC[3:1]
000
Description
0dB gain.
3dB gain.
6dB gain.
9dB gain.
12dB gain.
001
010
011
1xx
0
Reserved
Reserved. Read returns zero.
GPIO Pin Configuration
(Register 4Ch, R/W)
GC[15:10]
Reserved
GC[5:0]
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset setting for line 1 device = 003Fh
Reset setting for line 2 device = FC00h
The GPIO pin configuration register is read/write for configuring slot 12 I/O. These pins are digital commands (virtual
pins). This register specifies whether a GPIO pin is configured for input (1) or output (0). The digital controller sends
the desired GPIO pin value over output slot 12 in the outgoing stream of the AC-link before configuring any of these
bits for output.
PC-TEL, Inc.
20
2303N0DOCDAT10A-0899