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HT46R47(18SOP-A) 参数 Datasheet PDF下载

HT46R47(18SOP-A)图片预览
型号: HT46R47(18SOP-A)
PDF下载: 下载PDF文件 查看货源
内容描述: 模拟IC\n [Analog IC ]
分类和应用: 模拟IC
文件页数/大小: 45 页 / 293 K
品牌: ETC [ ETC ]
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HT46R47  
SET [m]  
Set data memory.  
Description  
Operation  
Each bit of the specified data memory is set to 1.  
[m] ¬ FFH  
Affected flag(s)  
TC2 TC1 TO PD OV  
Z
AC  
C
¾
¾
¾
¾
¾
¾
¾
¾
SET [m].i  
Set bit of data memory.  
Description  
Operation  
Bit ²i² of the specified data memory is set to 1.  
[m].i ¬ 1  
Affected flag(s)  
TC2 TC1 TO PD OV  
Z
AC  
C
¾
¾
¾
¾
¾
¾
¾
¾
SIZ [m]  
Skip if increment data memory is 0.  
Description  
The contents of the specified data memory are incremented by 1. If the result  
is 0, the following instruction, fetched during the current instruction execu-  
tion, is discarded and a dummy cycle is replaced to get the proper instruction  
(2 cycles). Otherwise proceed with the next instruction (1 cycle).  
Operation  
Skip if ([m]+1)=0, [m] ¬ ([m]+1)  
Affected flag(s)  
TC2 TC1 TO PD OV  
Z
AC  
C
¾
¾
¾
¾
¾
¾
¾
¾
SIZA [m]  
Increment data memory and place result in ACC, skip if 0.  
Description  
The contents of the specified data memory are incremented by 1. If the result  
is 0, the next instruction is skipped and the result is stored in the accumula-  
tor. The data memory remains unchanged. If the result is 0, the following in-  
struction, fetched during the current instruction execution, is discarded and  
a dummy cycle is replaced to get the proper instruction (2 cycles). Otherwise  
proceed with the next instruction (1 cycle).  
Operation  
Skip if ([m]+1)=0, ACC ¬ ([m]+1)  
Affected flag(s)  
TC2 TC1 TO PD OV  
Z
AC  
C
¾
¾
¾
¾
¾
¾
¾
¾
Rev. 1.40  
40  
July 18, 2001  
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