HT46R47
Instruction Set Summary
Instruction
Cycle
Flag
Affected
Mnemonic
Arithmetic
Description
ADD A,[m] Add data memory to ACC
ADDM A,[m] Add ACC to data memory
1
1(1)
1
Z,C,AC,OV
Z,C,AC,OV
Z,C,AC,OV
Z,C,AC,OV
Z,C,AC,OV
Z,C,AC,OV
Z,C,AC,OV
Z,C,AC,OV
ADD A,x
ADC A,[m]
Add immediate data to ACC
Add data memory to ACC with carry
1
ADCM A,[m] Add ACC to register with carry
Subtract immediate data from ACC
Subtract data memory from ACC
1(1)
1
SUB A,x
SUB A,[m]
1
1(1)
SUBM A,[m] Subtract data memory from ACC with result in data
memory
1
SBC A,[m]
Subtract data memory from ACC with carry
Z,C,AC,OV
Z,C,AC,OV
1(1)
SBCM A,[m] Subtract data memory from ACC with carry and result
in data memory
DAA [m]
Decimal adjust ACC for addition with result in data
memory
1(1)
C
Logic Operation
AND A,[m]
OR A,[m]
XOR A,[m]
AND data memory to ACC
OR data memory to ACC
Exclusive-OR data memory to ACC
1
1
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
1
ANDM A,[m] AND ACC to data memory
ORM A,[m] OR ACC to data memory
XORM A,[m] Exclusive-OR ACC to data memory
1(1)
1(1)
1(1)
1
AND A,x
OR A,x
AND immediate data to ACC
OR immediate data to ACC
1
XOR A,x
CPL [m]
CPLA [m]
Exclusive-OR immediate data to ACC
Complement data memory
Complement data memory with result in ACC
1
1(1)
1
Increment & Decrement
INCA [m]
INC [m]
Increment data memory with result in ACC
Increment data memory
1
Z
Z
Z
Z
1(1)
1
DECA [m]
DEC [m]
Decrement data memory with result in ACC
Decrement data memory
1(1)
Rev. 1.40
25
July 18, 2001
ETC [ ETC ]
