Version: 1.18
PRELIMINARY/CONFIDENTIAL
TrueSpeech® Co-Processor
D CT8022 Evaluation Board
The following diagram shows the layout of the CT8022. It indicates the positions of the main components and
connectors. The actual EVB may contain locations for additional components. These additional components are not
required for operation of the CT8022. They are intended to support operation of other devices in the CT8XXX
family. Connector pins are on a pitch of 0.1 inch.
3.7 inches
1
CODEC
1
0
32K x 16
SRAM
(on reverse
side)
J
1
J
3
7
1
CODEC
1
2.5
64
33
J
2
65
32
4
1
20
1
CT8022
J
P
2
XTAL
J
4
96
1
6
8
97
128
Figure C-1:
CT8022 Family EVB
The following components, shown on the full EVB schematics, were used for development purposes only and are not
required for normal operation of the CT8022:
•
•
•
external program SRAMs MCM670R-6
external EPROM 27010PLCC
connector JP1
EVB boards normally supplied to customers do not include these additional components. The EVB contains options
for several SRAM configurations. The minimum SRAM configuration for the CT8022 is 8K x 16, but 32K x 16 is
recommend for future compatibility.
The jumper pin connection settings for normal operation are TBD.
CT8022A11AQC FW Revision 0118 DSP GROUP, INC., 3120 SCOTT BOULEVARD
SANTA CLARA, CA 95054 PH: 408 986 – 4300 FAX: 408 986 – 4490
187
All specifications are subject to change without prior notice.
ETC [ ETC ]
