TrueSpeech® Co-Processor
PRELIMINARY/CONFIDENTIAL
Version: 1.18
2.3
CODEC Connection
DX0
DR0
CODEC
0
47K
47K
Optional second CODEC for
Full-Duplex (telephone)
Speakerphone
SCLK
Host
CT8022
FSYNC
CODEC 1 connects to
microphone and speaker
47K
47K
CODEC
1
DX1
DR1
Figure 2-4:
CODEC Connection
In Master mode, the CT8022 generates the FSYNC and SCLK signals.
In Slave mode, the FSYNC and SCLK signals are generated externally. In slave mode, the CT8022 FSYNC and
SCLK pins are inputs.
Note: During and after reset, the SCLK and FSYNC pins are configured as inputs. As such, they require
external pull-down resistors to ensure that a safe and defined logic level is present.
CODEC 0 is required only if standalone full-duplex speakerphone operation is desired (e.g. for use as an analog
telephone line speakerphone). In this configuration, CODEC 0 connects to the audio input/output of an analog
telephone line. CODEC 0 is not required for DSVD/Video Conferencing Speakerphone operation.
For CODEC-less operation, both CODEC0 and CODEC1 may be omitted. In this case, the FSYNC, SCLK, DR0
and DR1 inputs should have pull-down resistors connected to ground to ensure a valid input signal level.
18
DSP GROUP, INC., 3120 SCOTT BOULEVARD CT8022A11AQC FW Revision 0118
SANTA CLARA, CA 95054 PH: 408 986 – 4300 FAX: 408 986 – 4490
All specifications are subject to change without prior notice.
ETC [ ETC ]
