AD8138
OPERATIONAL DESCRIPTION
Definition of Terms
C
F
R
F
R
G
+IN
–OUT
+D
IN
V
OCM
–D
IN
AD8138
R
G
–IN
R
F
C
F
+OUT
R
L,dm
V
OUT,dm
Figure 2. Circuit Definitions
Differential voltage refers to the difference between two node
voltages. For example, the output differential voltage (or
equivalently output differential-mode voltage) is defined as:
V
OUT,dm
=
(V
+OUT
– V
–OUT
)
V
+OUT
and
V
–OUT
refer to the voltages at the +OUT and –OUT
terminals with respect to a common reference.
Common-mode voltage refers to the average of two node volt-
ages. The output common-mode voltage is defined as:
V
OUT,cm
=
(V
+OUT
+ V
–OUT
)/2
Balance is a measure of how well differential signals are matched in
amplitude and exactly 180 degrees apart in phase. Balance is most
easily determined by placing a well-matched resistor divider
between the differential voltage nodes and comparing the mag-
nitude of the signal at the divider’s midpoint with the magnitude
of the differential signal. (See TPC 26.) By this definition, output
balance is the magnitude of the output common-mode voltage
divided by the magnitude of the output differential-mode voltage:
Output Balance Error
=
THEORY OF OPERATION
circuit. Excellent performance over a wide frequency range has
proven difficult with this approach.
The AD8138 uses two feedback loops to separately control the
differential and common-mode output voltages. The differential
feedback, set with external resistors, controls only the differen-
tial output voltage. The common-mode feedback controls only
the common-mode output voltage. This architecture makes it
easy to arbitrarily set the output common-mode level. It is forced,
by internal common-mode feedback, to be equal to the voltage
applied to the V
OCM
input, without affecting the differential
output voltage.
The AD8138 architecture results in outputs that are very highly
balanced over a wide frequency range without requiring tightly
matched external components. The common-mode feedback
loop forces the signal component of the output common-mode
voltage to be zeroed. The result is nearly perfectly balanced
differential outputs, of identical amplitude and exactly 180
degrees apart in phase.
Analyzing an Application Circuit
The AD8138 uses high open-loop gain and negative feedback to
force its differential and common-mode output voltages in such
a way as to minimize the differential and common-mode error
voltages. The differential error voltage is defined as the voltage
between the differential inputs labeled +IN and –IN in Figure 2.
For most purposes, this voltage can be assumed to be zero.
Similarly, the difference between the actual output common-
mode voltage and the voltage applied to V
OCM
can also be assumed
to be zero. Starting from these two assumptions, any application
circuit can be analyzed.
Setting the Closed Loop Gain
Neglecting the capacitors C
F
, the differential mode gain of the
circuit in Figure 2 can be determined to be described by the
following equation:
V
OUT
,
dm
V
IN
,
dm
=
R
F S
R
G S
V
OUT
,
cm
V
OUT
,
dm
The AD8138 differs from conventional op amps in that it has
two outputs whose voltages move in opposite directions. Like an
op amp, it relies on high open loop gain and negative feedback
to force these outputs to the desired voltages. The AD8138
behaves much like a standard voltage feedback op amp and makes
it easy to perform single-ended-to-differential conversion,
common-mode level-shifting, and amplification of differential
signals. Also like an op amp, the AD8138 has high input imped-
ance and low output impedance.
Previous differential drivers, both discrete and integrated
designs, have been based on using two independent amplifiers,
and two independent feedback loops, one to control each of the
outputs. When these circuits are driven from a single-ended
source, the resulting outputs are typically not well balanced.
Achieving a balanced output has typically required exceptional
matching of the amplifiers and feedback networks.
DC common-mode level-shifting has also been difficult with
previous differential drivers. Level-shifting has required the use
of a third amplifier and feedback loop to control the output
common-mode level. Sometimes the third amplifier has also
been used to attempt to correct an inherently unbalanced
This assumes the input resistors, R
GS
and feedback resistors,
R
FS
on each side are equal.
Estimating the Output Noise Voltage
Similar to the case of a conventional op amp, the differential
output errors (noise and offset voltages) can be estimated by
multiplying the input referred terms, at +IN and –IN, by the
circuit noise gain. The noise gain is defined as:
R
G
N
=
1
+
F
R
G
To compute the total output referred noise for the circuit of
Figure 2, consideration must also be given to the contribution of
the resistors R
F
and R
G
. Refer to Table I for estimated output
noise voltage densities at various closed-loop gains.
Table I
Gain
1
2
5
10
R
G
R
F
( ) ( )
499
499
499
499
499
1.0 k
2.49 k
4.99 k
Bandwidth Output Noise
–3 dB
8138 Only
320 MHz
180 MHz
70 MHz
30 MHz
10 nV/√Hz
15 nV/√Hz
30 nV/√Hz
55 nV/√Hz
Output Noise
8138 + R
G
, R
F
11.5 nV/√Hz
16.6 nV/√Hz
31.6 nV/√Hz
56.6 nV/√Hz
REV. C
–9–
ETC [ ETC ]
