R
XC5200 Series Field Programmable Gate Arrays
XC5200 IOB Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are 100%
functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from benchmark
timing patterns. The following guidelines reflect worst-case values over the recommended operating conditions. For more
detailed, more precise, and more up-to-date timing information, use the values provided by the timing calculator and used
in the simulator.
Speed Grade
Symbol
-6
-5
-4
-3
Max
(ns)
Max
(ns)
Max
(ns)
Max
(ns)
Description
Input
Propagation Delays from CMOS or TTL Levels
Pad to I (no delay)
TPI
5.7
5.0
4.8
3.3
9.5
Pad to I (with delay)
TPID
11.4
10.2
10.2
Output
Propagation Delays to CMOS or TTL Levels
Output (O) to Pad (fast)
TOPF
TOPS
4.6
9.5
4.5
8.4
9.3
4.5
8.0
8.3
3.5
5.0
7.5
Output (O) to Pad (slew-limited)
From clock (CK) to output pad (fast), using direct connect between Q
and output (O)
TOKPOF
10.1
From clock (CK) to output pad (slew-limited), using direct connect be-
tween Q and output (O)
TOKPOS
14.9
13.1
11.8
10.0
3-state to Pad active (fast)
TTSONF
TTSONS
TGTS
5.6
5.2
9.0
4.9
8.3
4.6
6.0
3-state to Pad active (slew-limited)
Internal GTS to Pad active
10.4
17.7
7
15.9
14.7
13.5
Note: 1. Timing is measured at pin threshold, with 50-pF external capacitance loads. Slew-limited output rise/fall times are
approximately two times longer than fast output rise/fall times.
2. Unused and unbonded IOBs are configured by default as inputs with internal pull-up resistors.
3. Timing is based upon the XC5215 device. For other devices, see Timing Calculator.
November 5, 1998 (Version 5.2)
7-131
ETC [ ETC ]
