R
XC4000E and XC4000X Series Field Programmable Gate Arrays
C1 • • • C4
4
WE
D1
D0
EC
Enable
DIN
G1 • • • G4
4
WRITE
DECODER
1 of 16
4
16-LATCH
ARRAY
MUX
G'
READ ADDRESS
Enable
DIN
F1 • • • F4
4
WRITE
DECODER
1 of 16
4
16-LATCH
ARRAY
MUX
F'
X6746
READ ADDRESS
6
Figure 9: 16x2 (or 16x1) Level-Sensitive Single-Port RAM
C1 • • • C4
4
WE
D1/A4
D0
EC
Enable
DIN
G1 • • • G4
F 1 • • • F4
4
WRITE
DECODER
1 of 16
16-LATCH
ARRAY
MUX
G'
4
READ ADDRESS
H'
Enable
DIN
4
WRITE
DECODER
1 of 16
16-LATCH
ARRAY
MUX
F'
4
READ ADDRESS
X6749
Figure 10: 32x1 Level-Sensitive Single-Port RAM (F and G addresses are identical)
May 14, 1999 (Version 1.6)
6-17
ETC [ ETC ]
