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NT5DS16M8AT-7K 参数 Datasheet PDF下载

NT5DS16M8AT-7K图片预览
型号: NT5DS16M8AT-7K
PDF下载: 下载PDF文件 查看货源
内容描述: DDR同步DRAM [DDR Synchronous DRAM ]
分类和应用: 内存集成电路光电二极管动态存储器双倍数据速率时钟
文件页数/大小: 76 页 / 1242 K
品牌: ETC [ ETC ]
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NT5DS32M4AT  
NT5DS16M8AT  
128Mb Double Data Rate SDRAM  
Operating Mode  
The normal operating mode is selected by issuing a Mode Register Set Command with bits A7-A11 to zero, and bits A0-A6 set  
to the desired values. A DLL reset is initiated by issuing a Mode Register Set command with bits A7 and A9-A11 each set to  
zero, bit A8 set to one, and bits A0-A6 set to the desired values. A Mode Register Set command issued to reset the DLL should  
always be followed by a Mode Register Set command to select normal operating mode.  
All other combinations of values for A7-A11 are reserved for future use and/or test modes. Test modes and reserved states  
should not be used as unknown operation or incompatibility with future versions may result.  
CAS Latencies  
CAS Latency = 2, BL = 4  
CK  
CK  
Read  
NOP  
NOP  
NOP  
NOP  
NOP  
Command  
CL=2  
DQS  
DQ  
CAS Latency = 2.5, BL = 4  
CK  
CK  
Read  
NOP  
NOP  
NOP  
NOP  
NOP  
Command  
CL=2.5  
DQS  
DQ  
Shown with nominal t , t  
, and t  
.
Don’ t Care  
AC DQSCK  
DQSQ  
11  
REV 1.0  
May, 2001  
©
NANYA TECHNOLOGY CORP. All rights reserved.  
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.  
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