System
clock
generator
CPU
H8/300H
Subclock
generator
Data bus (lower)
P10/TMOW
P11/PWM
P12
P67/FTIOD1
P66/FTIOC1
P65/FTIOB1
P64/FTIOA1
P63/FTIOD0
P62/FTIOC0
P61/FTIOB0
P60/FTIOA0
P14/
P15/
P17/
/TMIB1
P16/
RAM
IIC2
/TRGV
ROM
P20/SCK3
P21/RXD
P22/TXD
P23
P76/TMOV
P75/TMCIV
P74/TMRIV
P72/TXD_2
P71/RXD_2
P70/SCK3_2
P24
RTC
SCI3
P30
P31
P32
P33
P34
P35
P36
P37
14-bit
PWM
SCI3_2
Watchdog
timer
Timer Z
Timer V
P87
P86
P85
Timer B1
P57/SCL
P56/SDA
/
P55/
P54/
A/D converter
P53/
SDA
SCL
P52/
P51/
Data bus (upper)
Address bus
P50/
EEPROM
Port B
Note: The HD64N3687G is a laminated-structure product in which an EEPROM chip is mounted on the HD64F3687G (F-ZTATTM version).
The HD6483687G is a laminated-structure product in which an EEPROM chip is mounted on the HD6433687G (mask-ROM version).
Figure 1.2 Internal Block Diagram of H8/3687N (EEPROM Laminated Version)
Rev. 3.00, 05/03, page 4 of 472
ETC [ ETC ]
