74LCX244 Low Voltage Buffer/Line Driver with 5V Tolerant Inputs and Outputs
February 1994
Revised February 2001
74LCX244
Low Voltage Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
The LCX244 contains eight non-inverting buffers with
3-STATE outputs. The device may be employed as a mem-
ory address driver, clock driver and bus-oriented transmit-
ter/receiver. The LCX244 is designed for low voltage (2.5V
or 3.3V) V
CC
applications with capability of interfacing to a
5V signal environment.
The LCX244 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V–3.6V V
CC
specifications provided
s
6.5 ns t
PD
max (V
CC
=
3.3V), 10
µ
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
±
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX244WM
74LCX244SJ
74LCX244MSA
74LCX244MTC
Package Number
M20B
M20D
MSA20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
© 2001 Fairchild Semiconductor Corporation
DS500107
www.fairchildsemi.com
ETC [ ETC ]
