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PEP-1 参数 Datasheet PDF下载

PEP-1图片预览
型号: PEP-1
PDF下载: 下载PDF文件 查看货源
内容描述: 图像增强处理器 [Picture Enhancement Processor]
分类和应用:
文件页数/大小: 2 页 / 212 K
品牌: ZORAN [ ZORAN CORPORATION ]
 浏览型号PEP-1的Datasheet PDF文件第2页  
PEP-1
Picture Enhancement Processor
DVD
Digital Camera
Driving the Digital Lifestyle
Digital TV
Imaging
IP Cores
Product Brief
Zoran Corporation
1390 Kifer Road
Sunnyvale, CA 94086-5305
Te l 408.523.6500
Fax 408.523.6501
www.zoran.com
Description
Zoran's PEP-1 Picture Enhancement Processor is a silicon-efficient
Intellectual Property Core for video IC designs. By providing sharper,
contrast-enhanced video, PEP-1 achieves significant quality improve-
ment. PEP-1 is based on Zoran's extensive experience delivering high
quality, high volume video ICs to major consumer products manufac-
turers worldwide. Using a robust contrast enhancement algorithm
(dynamic range enhancement), PEP-1 greatly reduces the risk and
time involved when integrating picture enhancement functions into an
IC. As a result, expensive, discrete components can be eliminated
from system designs. When used in conjunction with Zoran's other IP
Core products, a silicon and memory efficient implementation can be
achieved.
VIP-II Demonstration System
Zoran offers the VIP-II FPGA demonstration system for evaluation of
the PEP-1 Picture Enhancement Processor. The VIP-II allows cus-
tomers to input composite video, s-video, or component video to test
the PEP-1's performance.
Features
Robust contrast enhancement
Dynamic range enhancement
Pixel-by-pixel processing
Adaptive processing based on input video characteristics
CCIR656 input and CCIR656 output
Silicon efficient, fully-synchronous design
Requires only a single clock input
Combinable with other Zoran IP Cores for efficient implementation
Process technology independent "softcore"
Integrated Circuit Applications
• Video display processors
• Digital-TV
• LCD-TV
• PDP-TV
• Projector TV Systems
Deliverables
• Compilable Verilog source code
• Bit accurate, cycle accurate C++ model
• Synopsis synthesis scripts
• Test bench
• Documentation
• VIP-II FPGA demonstration system available
8/12/04-TS
PEP1-PB-1.0