U62256A
Symbol
Alt. IEC
07
10
Switching Characteristics
Read Cycle
Unit
Min.
Max.
Min.
Max.
Read Cycle Time
t
t
70
100
ns
RC
cR
Address Access Time to Data Valid
Chip Enable Access Time to Data Valid
Output Enable Access Time to Data Valid
E HIGH to Output in High-Z
t
t
t
70
70
35
25
25
100
100
45
ns
ns
ns
ns
ns
ns
ns
ns
AA
a(A)
a(E)
a(G)
t
ACE
t
t
OE
t
t
t
35
HZCE
HZOE
dis(E)
dis(G)
G HIGH to Output in High-Z
t
35
E LOW to Output in Low-Z
t
t
5
0
5
5
0
5
LZCE
LZOE
en(E)
en(G)
G LOW to Output in Low-Z
t
t
Output Hold Time from Address Change
t
t
v(A)
OH
Symbol
Alt. IEC
07
10
Switching Characteristics
Write Cycle
Unit
Min.
70
55
55
0
Max.
Min.
100
70
70
0
Max.
Write Cycle Time
t
t
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
cW
Write Pulse Width
t
t
t
w(W)
WP
WP
Write Pulse Width Setup Time
Address Setup Time
t
su(W)
t
t
su(A)
AS
AW
CW
CW
Address Valid to End of Write
Chip Enable Setup Time
Pulse Width Chip Enable to End of Write
Data Setup Time
t
t
65
65
65
30
0
80
80
80
35
0
su(A-WH)
t
t
t
su(E)
t
w(E)
t
t
su(D)
DS
DH
AH
Data Hold Time
t
t
h(D)
h(A)
Address Hold from End of Write
W LOW to Output in High-Z
G HIGH to Output in High-Z
W HIGH to Output in Low-Z
G LOW to Output in Low-Z
t
t
0
0
t
t
t
25
25
35
35
HZWE
dis(W)
t
t
HZOE
LZWE
dis(G)
en(W)
t
0
0
0
0
t
t
en(G)
LZOE
April 20, 2004
5