Z8 Encore!® Motor Control Flash MCUs
Product Specification
64
Table 39. Watch-Dog Timer Approximate Time-Out Delays
Approximate Time-Out Delay
WDT Reload
Value
(with 10KHz Typical WDT Oscillator Frequency)
WDT Reload
Value (Hex)
(Decimal)
Typical
102ms
6.55s
Description
0400
1024
Reset default value time-out delay.
Maximum time-out delay.
FFFF
65,536
Watch-Dog Timer Refresh
When first enabled, the Watch-Dog Timer is loaded with the value in the Watch-Dog
Timer Reload registers. The Watch-Dog Timer then counts down to 0000hunless a WDT
instruction is executed by the eZ8 CPU. Execution of the WDTinstruction causes the down-
counter to be reloaded with the WDT Reload value stored in the Watch-Dog Timer Reload
registers. Counting resumes following the reload operation.
When the Z8FMC16100 Series Flash MCU is operating in DEBUG Mode (through the
On-Chip Debugger), the Watch-Dog Timer is continuously refreshed to prevent spurious
Watch-Dog Timer time-outs.
Watch-Dog Timer Time-Out Response
The Watch-Dog Timer times out when the counter reaches 0000h. A time-out of the
Watch-Dog Timer generates either a system exception or a Reset. The WDT_RESOption
Bit determines the time-out response of the Watch-Dog Timer. Refer to the Option Bits
chapter for information regarding programming of the WDT_RESOption Bit.
WDT System Exception in Normal Operation
If configured to generate a system exception when a time-out occurs, the Watch-Dog
Timer issues an exception request to the interrupt controller. The eZ8 CPU responds to the
request by fetching the System Exception vector and executing code from the vector
address. After time-out and system exception generation, the Watch-Dog Timer is
reloaded automatically and continues counting.
WDT System Exception in Stop Mode
If configured to generate a system exception when a time-out occurs and the
Z8FMC16100 Series Flash MCU is in STOP mode, the Watch-Dog Timer automatically
initiates a Stop-Mode Recovery and generates a system exception request. Both the WDT
status bit and the STOPbit in the Reset Status and Control Register section on page 29 are
set to 1 following WDT time-out in STOP mode. Refer to the Reset and Stop-Mode
Recovery chapter on page 23 for more information.
Watch-Dog Timer
P R E L I M I N A R Y
PS024604-1005
ZILOG [ ZILOG, INC. ]
