欢迎访问ic37.com |
会员登录 免费注册
发布采购

Z8F1602AR020EC 参数 Datasheet PDF下载

Z8F1602AR020EC图片预览
型号: Z8F1602AR020EC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采微控制器与闪存和10位A / D转换器 [Z8 Encore Microcontrollers with Flash Memory and 10-Bit A/D Converter]
分类和应用: 转换器闪存微控制器和处理器外围集成电路时钟
文件页数/大小: 246 页 / 1767 K
品牌: ZILOG [ ZILOG, INC. ]
 浏览型号Z8F1602AR020EC的Datasheet PDF文件第13页浏览型号Z8F1602AR020EC的Datasheet PDF文件第14页浏览型号Z8F1602AR020EC的Datasheet PDF文件第15页浏览型号Z8F1602AR020EC的Datasheet PDF文件第16页浏览型号Z8F1602AR020EC的Datasheet PDF文件第18页浏览型号Z8F1602AR020EC的Datasheet PDF文件第19页浏览型号Z8F1602AR020EC的Datasheet PDF文件第20页浏览型号Z8F1602AR020EC的Datasheet PDF文件第21页  
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x  
Z8 Encore!®  
xvii  
Braces  
The curly braces, { }, indicate a single register or bus created by concatenating some com-  
bination of smaller registers, buses, or individual bits.  
Example: the 12-bit register address {0H, RP[7:4], R1[3:0]} is composed of a 4-bit  
hexadecimal value (0H) and two 4-bit register values taken from the Register Pointer  
(RP) and Working Register R1. 0His the most significant nibble (4-bit value) of the  
12-bit register, and R1[3:0] is the least significant nibble of the 12-bit register.  
Parentheses  
The parentheses, ( ), indicate an indirect register address lookup.  
Example: (R1) is the memory location referenced by the address contained in the  
Working Register R1.  
Parentheses/Bracket Combinations  
The parentheses, ( ), indicate an indirect register address lookup and the square brackets,  
[ ], indicate a register or bus.  
Example: assume PC[15:0] contains the value 1234h. (PC[15:0]) then refers to the  
contents of the memory location at address 1234h.  
Use of the Words Set, Reset and Clear  
The word set implies that a register bit or a condition contains a logical 1. The words reset  
or clear imply that a register bit or a condition contains a logical 0. When either of these  
terms is followed by a number, the word logical may not be included; however, it is  
implied.  
Notation for Bits and Similar Registers  
A field of bits within a register is designated as: Register[n:n].  
Example: ADDR[15:0] refers to bits 15 through bit 0 of the Address.  
Use of the Terms LSB, MSB, lsb, and msb  
In this document, the terms LSB and MSB, when appearing in upper case, mean least sig-  
nificant byte and most significant byte, respectively. The lowercase forms, lsb and msb,  
mean least significant bit and most significant bit, respectively.  
Use of Initial Uppercase Letters  
Initial uppercase letters designate settings, modes, and conditions in general text.  
Example 1: Stop mode.  
Example 2: The receiver forces the SCL line to Low.  
The Master can generate a Stop condition to abort the transfer.  
PS017610-0404  
Manual Objectives  
 复制成功!