Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
Z8 Encore!®
133
VREF
Internal Voltage
Reference Generator
Analog Input
Multiplexer
ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7
ANA8
ANA9
ANA10
ANA11
Analog-to-Digital
Converter
Reference Input
Analog Input
ANAIN[3:0]
Figure 83. Analog-to-Digital Converter Block Diagram
Operation
Automatic Power-Down
If the ADC is idle (no conversions in progress) for 160 consecutive system clock cycles,
portions of the ADC are automatically powered-down. From this power-down state, the
ADC requires 40 system clock cycles to power-up. The ADC powers up when a conver-
sion is requested using the ADC Control register.
Single-Shot Conversion
When configured for single-shot conversion, the ADC performs a single analog-to-digital
conversion on the selected analog input channel. After completion of the conversion, the
ADC shuts down. The steps for setting up the ADC and initiating a single-shot conversion
are as follows:
PS017610-0404
Analog-to-Digital Converter
ZILOG [ ZILOG, INC. ]
