Z8 Encore! XP® F08xA Series
Product Specification
146
Table 95. ADC Calibration Data Location
Info Page
Address
Memory
Address
Compensation
Usage
ADC Mode
Reference Type
Internal 2.0V
Internal 2.0V
Internal 2.0V
Internal 1.0V
Internal 1.0V
Internal 1.0V
External 2.0V
External 2.0V
External 2.0V
Internal 2.0V
Internal 2.0V
Internal 2.0V
External 2.0V
External 2.0V
External 2.0V
Internal 2.0V
Internal 2.0V
Internal 2.0V
Internal 1.0V
Internal 1.0V
Internal 1.0V
External 2.0V
External 2.0V
External 2.0V
Internal 2.0V
Internal 2.0V
Internal 2.0V
External 2.0V
60
08
09
63
0A
0B
66
0C
0D
69
0E
0F
6C
10
11
6F
12
13
72
14
15
75
16
17
78
18
19
7B
FE60
FE08
FE09
FE63
FE0A
FE0B
FE66
FE0C
FE0D
FE69
FE0E
FE0F
FE6C
FE10
FE11
FE6F
FE12
FE13
FE72
FE14
FE15
FE75
FE16
FE17
FE78
FE18
FE19
FE7B
Offset
Single-Ended Unbuffered
Gain High Byte Single-Ended Unbuffered
Gain Low Byte Single-Ended Unbuffered
Offset
Single-Ended Unbuffered
Gain High Byte Single-Ended Unbuffered
Gain Low Byte Single-Ended Unbuffered
Offset
Single-Ended Unbuffered
Gain High Byte Single-Ended Unbuffered
Gain Low Byte Single-Ended Unbuffered
Offset
Single Ended 1x Buffered
Gain High Byte Single Ended 1x Buffered
Gain Low Byte Single Ended 1x Buffered
Offset
Single Ended 1x Buffered
Gain High Byte Single Ended 1x Buffered
Gain Low Byte Single Ended 1x Buffered
Offset
Differential Unbuffered
Gain High Byte Differential Unbuffered
Gain Low Byte Differential Unbuffered
Offset
Differential Unbuffered
Gain High Byte Differential Unbuffered
Gain Low Byte Differential Unbuffered
Offset
Differential Unbuffered
Gain High Byte Differential Unbuffered
Gain Low Byte Differential Unbuffered
Offset
Differential 1x Buffered
Gain High Byte Differential 1x Buffered
Gain Low Byte Differential 1x Buffered
Offset
Differential 1x Buffered
PS024705-0405
P R E L I M I N A R Y
Flash Option Bits
ZILOG [ ZILOG, INC. ]
