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Z8F082ASH020SC 参数 Datasheet PDF下载

Z8F082ASH020SC图片预览
型号: Z8F082ASH020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采XP -R F08xA系列与扩展外设 [Z8 Encore XP-R F08xA Series with eXtended Peripherals]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 244 页 / 2750 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8 Encore! XP® F08xA Series  
Product Specification  
141  
Flash Program Memory Address 0000H  
Table 87. Flash Option Bits at Program Memory Address 0000H  
BITS  
7
6
5
4
3
2
1
0
WDT_RES WDT_AO  
OSC_SEL[1:0]  
VBO_AO  
FRP  
Reserved  
FWP  
FIELD  
RESET  
R/W  
U
U
U
U
U
U
U
U
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
Program Memory 0000H  
ADDR  
Note: U = Unchanged by Reset. R/W = Read/Write.  
WDT_RES—Watch-Dog Timer Reset  
0 = Watch-Dog Timer time-out generates an interrupt request. Interrupts must be globally  
enabled for the eZ8 CPU to acknowledge the interrupt request.  
1 = Watch-Dog Timer time-out causes a system reset. This setting is the default for unpro-  
grammed (erased) Flash.  
WDT_AO—Watch-Dog Timer Always On  
0 = Watch-Dog Timer is automatically enabled upon application of system power. Watch-  
Dog Timer can not be disabled.  
1 = Watch-Dog Timer is enabled upon execution of the WDT instruction. Once enabled,  
the Watch-Dog Timer can only be disabled by a Reset or STOP Mode Recovery. This set-  
ting is the default for unprogrammed (erased) Flash.  
OSC_SEL[1:0]—Oscillator Mode Selection  
00 = On-chip oscillator configured for use with external RC networks (<4MHz).  
01 = Minimum power for use with very low frequency crystals (32KHz to 1.0MHz).  
10 = Medium power for use with medium frequency crystals or ceramic resonators  
(0.5MHz to 5.0MHz).  
11 = Maximum power for use with high frequency crystals (5.0MHz to 20.0MHz). This  
setting is the default for unprogrammed (erased) Flash.  
VBO_AO—Voltage Brown-Out Protection Always On  
0 = Voltage Brown-Out Protection is disabled in STOP mode to reduce total power con-  
sumption.  
1 = Voltage Brown-Out Protection is always enabled including during STOP mode. This  
setting is the default for unprogrammed (erased) Flash.  
FRP—Flash Read Protect  
0 = User program code is inaccessible. Limited control features are available through the  
On-Chip Debugger.  
1 = User program code is accessible. All On-Chip Debugger commands are enabled. This  
setting is the default for unprogrammed (erased) Flash.  
Reserved—Must be 1.  
PS024705-0405  
P R E L I M I N A R Y  
Flash Option Bits  
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