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Z8F012APB020SC 参数 Datasheet PDF下载

Z8F012APB020SC图片预览
型号: Z8F012APB020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采XP -R 4K系列高性能8位微控制器 [Z8 Encore XP-R 4K Series High-Performance 8-Bit Microcontrollers]
分类和应用: 微控制器外围集成电路光电二极管时钟
文件页数/大小: 276 页 / 3422 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8 Encore! XP® 4K Series  
Product Specification  
150  
Randomized Lot Identification Bits  
As an optional feature, ZiLOG is able to provide a factory-programmed random lot identi-  
fier. With this feature, all devices in a given production lot will be programmed with the  
same random number. This random number is uniquely regenerated for each successive  
production lot and is not likely to be repeated.  
The randomized lot identifier is a 32 byte binary value, stored in the flash information  
page (see Reading the Flash Information Page on page 150 and Randomized Lot Identifier  
on page 159 for more details) and is unaffected by mass erasure of the device's flash mem-  
ory.  
Reading the Flash Information Page  
The following code example shows how to read data from the flash information area.  
; get value at info address 60 (FE60h)  
ldx FPS, #%80 ; enable access to flash info page  
ld R0, #%FE  
ld R1, #%60  
ldc R2, @RR0 ; R2 now contains the calibration value  
Flash Option Bit Control Register Definitions  
Trim Bit Address Register  
The Trim Bit Address (TRMADR) register contains the target address for an access to the  
trim option bits.  
Table 87. Trim Bit Address Register (TRMADR)  
BITS  
7
6
5
4
3
2
1
0
TRMADR - Trim Bit Address (00H to 1FH)  
FIELD  
RESET  
R/W  
0
0
0
0
0
0
0
0
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
R/W  
FF6H  
ADDR  
PS022815-0206  
Flash Option Bits