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Z8F021APH020SC 参数 Datasheet PDF下载

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型号: Z8F021APH020SC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8喝采! XP -R 4K系列高性能8位微控制器 [Z8 Encore! XP-R 4K Series High-Performance 8-Bit Microcontrollers]
分类和应用: 微控制器和处理器外围集成电路光电二极管时钟
文件页数/大小: 276 页 / 3422 K
品牌: ZILOG [ ZILOG, INC. ]
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Z8 Encore! XP® 4K Series  
Product Specification  
165  
Byte Read  
To read a byte from the NVDS array, user code must first push the address onto the stack.  
User code issues a CALLinstruction to the address of the byte-read routine (0x1000). At  
the return from the sub-routine, the read byte resides in working register R0, and the read  
status byte resides in working register R1. The contents of the status byte are undefined for  
read operations to illegal addresses. Also, the user code should pop the address byte off the  
stack.  
The read routine uses 9 bytes of stack space in addition to the one byte of address pushed  
by the user. Sufficient memory must be available for this stack usage.  
Because of the Flash memory architecture, NVDS reads exhibit a non-uniform execution  
time. A read operation takes between 44 μs and 489 μs (assuming a 20 MHz system  
clock). Slower system clock speeds result in proportionally higher execution times.  
NVDS byte reads from invalid addresses (those exceeding the NVDS array size) return  
0xff. Illegal read operations have a 2 μs execution time.  
The status byte returned by the NVDS read routine is zero for successful read, as deter-  
mined by a CRC check. If the status byte is non-zero, there was a corrupted value in the  
NVDS array at the location being read. In this case, the value returned in R0 is the byte  
most recently written to the array that does not have a CRC error.  
Power Failure Protection  
The NVDS routines employ error checking mechanisms to ensure a power failure endan-  
gers only the most recently written byte. Bytes previously written to the array are not per-  
turbed.  
A system reset (such as a pin reset or watchdog timer reset) that occurs during a write  
operation also perturbs the byte currently being written. All other bytes in the array are  
unperturbed.  
Optimizing NVDS Memory Usage for Execution Speed  
As Table 107 shows, the NVDS read time varies drastically, this discrepancy being a  
trade-off for minimizing the frequency of writes that require post-write page erases. The  
NVDS read time of address N is a function of the number of writes to addresses other than  
N since the most recent write to address N, as well as the number of writes since the most  
recent page erase. Neglecting effects caused by page erases and results caused by the ini-  
tial condition in which the NVDS is blank, a rule of thumb is that every write since the  
most recent page erase causes read times of unwritten addresses to increase by 1 μs, up to  
a maximum of (511-NVDS_SIZE) μs.  
PS022815-0206  
Non-Volatile Data Storage  
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