Z86E30/E31/E40
Z8 4K OTP Microcontroller
Zilog
Table 4. 40-Pin DIP Package Pin Identification
EPROM Mode
1
NC
D5
40
NC
D4
Pin # Symbol Function
Direction
1
1
NC
No Connection
Data 5,6,7
D6
D7
A4
A5
D3
D2
D1
D0
2-4
5-7
8-9
10
11
D5-D7
A4-A6
NC
In/Output
Input
Address 4,5,6
No Connection
Address 7
A6
A3
A7
Input
NC
NC
A7
NC
NC
GND
A2
NC
NC
A1
V
Power Supply
CC
40-Pin DIP
12-14 NC
No Connection
Chip Select
VCC
NC
NC
NC
/CE
/OE
EPM
VPP
A8
15
16
17
18
19
/CE
/OE
EPM
VPP
A8
Input
Input
Input
Input
Input
Output Enable
EPROM Prog. Mode
Prog. Voltage
Address 8
A0
/PGM
A10
A11
A9
20-21 NC
No Connection
Address 9
22
23
24
25
A9
Input
Input
Input
Input
Input
A11
A10
/PGM
Address 11
20
21
NC
NC
Address 10
Prog. Mode
Figure 6. 40-Pin DIP Pin Configuration*
EPROM Mode
26-27 A0-A1
28-29 NC
Address 0,1
No Connection
Address 2
30
31
A2
Input
GND
Ground
32-33 NC
34 A3
35-39 D0-D4
No Connection
Address 3
Input
Data 0,1,2,3,4
No Connection
In/Output
40
NC
Note:
*Pin Configuration and Description identical on DIP and Cerdip
Window Lid style packages.
DS97Z8X0500
P R E L I M I N A R Y
7
ZILOG [ ZILOG, INC. ]
