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Z86E4016VEC 参数 Datasheet PDF下载

Z86E4016VEC图片预览
型号: Z86E4016VEC
PDF下载: 下载PDF文件 查看货源
内容描述: Z8 4K OTP微控制器 [Z8 4K OTP Microcontroller]
分类和应用: 微控制器和处理器可编程只读存储器时钟
文件页数/大小: 66 页 / 452 K
品牌: ZILOG [ ZILOG, INC. ]
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Z86E30/E31/E40  
Z8 4K OTP Microcontroller  
Zilog  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Min  
Max  
Units  
Ambient Temperature under Bias  
Storage Temperature  
–40  
–65  
+105  
+150  
+7  
C
C
V
Voltage on any Pin with Respect to V [Note 1]  
–0.6  
SS  
Voltage on V Pin with Respect to V  
–0.3  
–0.6  
+7  
V
V
DD  
SS  
Voltage on XTAL1 and /RESET Pins with Respect to V [Note 2]  
V
+1  
DD  
SS  
Total Power Dissipation  
1.21  
220  
W
Maximum Allowable Current out of V  
mA  
SS  
Maximum Allowable Current into V  
180  
mA  
DD  
Maximum Allowable Current into an Input Pin [Note 3]  
Maximum Allowable Current into an Open-Drain Pin [Note 4]  
Maximum Allowable Output Current Sinked by Any I/O Pin  
Maximum Allowable Output Current Sourced by Any I/O Pin  
Maximum Allowable Output Current Sinkedd by /RESET Pin  
–600  
–600  
+600  
+600  
25  
µA  
µA  
mA  
mA  
25  
3 mA  
Notes:  
1. This applies to all pins except XTAL pins and where otherwise noted.  
2. There is no input protection diode from pin to V  
.
DD  
3. This excludes XTAL pins.  
4. Device pin is not at an output Low state.  
Stresses greater than those listed under Absolute Maxi-  
mum Ratings may cause permanent damage to the de-  
vice. This is a stress rating only; functional operation of the  
device at any condition above those indicated in the oper-  
ational sections of these specifications is not implied. Ex-  
posure to absolute maximum rating conditions for an ex-  
tended period may affect device reliability.  
Total power dissipation should not exceed 1.2 W for the  
package. Power dissipation is calculated as follows:  
Total Power Dissipation = V x [ I – (sum of I ) ]  
DD  
DD  
OH  
+ sum of [ (V  
– V ) x I  
]
DD  
OH  
OH  
+ sum of (V x I )  
0L  
0L  
STANDARD TEST CONDITIONS  
The characteristics listed below apply for standard test  
conditions as noted. All voltages are referenced to  
Ground. Positive current flows into the referenced pin  
(Test Load).  
From Output  
Under Test  
150 pF  
Figure 13. Test Load Diagram  
12  
P R E L I M I N A R Y  
DS97Z8X0500