=ꢁꢂꢃꢄꢅꢆ=ꢁꢅꢃꢄꢅ
(QKDQFHGꢀ6HULDOꢀ&RPPXQLFDWLRQVꢀ&RQWUROOHU
ꢇꢅꢄ
RSHUDWHꢀLQꢀ5HFHLYHꢀ,QWHUUXSWVꢀRQꢀ)LUVWꢀ&KDUDFWHUꢀDQGꢀ6SHFLDOꢀ&RQGLWLRQꢄꢀ
LQVWHDGꢀRIꢀ5HFHLYHꢀ,QWHUUXSWꢀRQꢀ6SHFLDOꢀ&RQGLWLRQꢀ2QO\ꢍ
In this mode, the Anti-Lock feature is not enabled. The FIFO is locked after the last
character of a frame has been transferred, and the interrupt condition does not
disappear until after an ErrorResetcommand is issued to the ESCC. No Reset
HighestIUScommand can clear any IP bit.
'DLV\ꢀ&KDLQ±ꢀ7KLVꢀZRUNDURXQGꢀXVHVꢀWKHꢀIROORZLQJꢀWZRꢀFRQGLWLRQVꢊ
–
7KHꢀ(2)ꢀLQWHUUXSWꢀLVꢀWKHꢀKLJKHVWꢀSULRULW\ꢀLQWHUUXSWꢀLIꢀRQO\ꢀRQHꢀFKDQQHOꢀLVꢀ
XVHGꢍ
–
&KDQQHOꢀ$ꢀLVꢀWKHꢀRQO\ꢀFKDQQHOꢀLVVXLQJꢀLQWHUUXSWVꢍ
If both conditions are satisfied, allowing nested interrupts can solve the problem.
The processor servicing an interrupt on the daisy chain must be interruptible again
from another interrupt of higher priority on that same daisy chain.
55ꢑꢀ5HJLVWHU±7KLVꢀZRUNDURXQGꢀLVꢀDSSOLFDEOHꢀLIꢀWKHꢀ(2)ꢀLQWHUUXSWꢀLVꢀXVHGꢀRQO\ꢀ
WRꢀQRWLI\ꢀDQRWKHUꢀSDUWꢀRIꢀWKHꢀVRIWZDUHꢀWKDWꢀWKHUHꢀKDVꢀEHHQꢀDQRWKHUꢀIUDPHꢀ
UHFHLYHGꢊ
–
–
5HDGꢀ55ꢑꢀDIWHUꢀLVVXLQJꢀWKHꢀResetꢀIUSꢀFRPPDQGꢍ
&KHFNꢀELWꢀꢇꢀRIꢀ55ꢑꢍꢀ7KLVꢀELWꢄꢀZKHQꢀVHWꢄꢀLQGLFDWHVꢀWKDWꢀWKHꢀ6'/&ꢀIUDPHꢀ
),)2ꢀFRQWDLQVꢀDꢀYDOLGꢀIUDPHꢍꢀ$OWKRXJKꢀRQHꢀLQWHUUXSWꢀPLJKWꢀKDYHꢀEHHQꢀORVWꢀ
ꢏ,3ꢀUHVHWꢐꢀE\ꢀWKHꢀResetꢀIUSꢀFRPPDQGꢄꢀELWꢀꢇꢀRIꢀ55ꢑꢀDOZD\VꢀLQGLFDWHVꢀWKDWꢀDWꢀ
OHDVWꢀRQHꢀIUDPHꢀLVꢀDYDLODEOHꢀLQꢀWKHꢀIUDPHꢀ),)2ꢍꢀ,IꢀELWꢀꢇꢀRIꢀ55ꢑꢀLVꢀꢆꢄꢀQRWLI\ꢀ
WKHꢀFRQFHUQHGꢀSDUWꢀRIꢀWKHꢀVRIWZDUHꢀWKDWꢀDWꢀOHDVWꢀRQHꢀIUDPHꢀLVꢀDYDLODEOHꢀLQꢀ
WKHꢀIUDPHꢀ),)2ꢍ
:KHQꢀWKHꢀ6'/&ꢀ),)2ꢀLVꢀHQDEOHGꢀDQGꢀ5HFHLYHꢀ,QWHUUXSWVꢀRQꢀ6SHFLDOꢀ&RQGLWLRQVꢀ
2QO\ꢀLVꢀVHOHFWHGꢄꢀVRIWZDUHꢀFKHFNVꢀWKDWꢀWKHUHꢀLVꢀDꢀ5HFHLYHꢀ&KDUDFWHUꢀ$YDLODEOHꢀ
LQWHUUXSWꢄꢀZKLFKꢀLVꢀJHQHUDWHGꢀE\ꢀ'0$ꢀUHDGLQJꢀDQꢀ(2)ꢀFKDUDFWHUꢄꢀDQGꢀEHIRUHꢀLVVXꢈ
LQJꢀWKHꢀResetꢀHighestꢀIUSꢀFRPPDQGꢍꢀ2WKHUZLVHꢄꢀWKHꢀ(2)ꢀLQWHUUXSWꢀFRQGLWLRQVꢀ
DUHꢀFOHDUHGꢀE\ꢀWKDWꢀFRPPDQGꢍ
)LJXUHꢀꢂꢇꢀLOOXVWUDWHVꢀWKHꢀSURFHGXUHꢀIRUꢀUHVHWWLQJꢀKLJKHVWꢀ,86ꢍ
36ꢋꢋꢁꢂꢋꢃꢈꢆꢆꢋꢃ
=ꢌꢋꢃꢂꢋꢎ=ꢌꢁꢃꢂꢋꢀ(UUDWD
ZILOG [ ZILOG, INC. ]
