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Z8018008VSC 参数 Datasheet PDF下载

Z8018008VSC图片预览
型号: Z8018008VSC
PDF下载: 下载PDF文件 查看货源
内容描述: 家庭MPU [Family MPU]
分类和应用:
文件页数/大小: 326 页 / 1089 K
品牌: ZILOG [ ZILOG, INC. ]
 浏览型号Z8018008VSC的Datasheet PDF文件第190页浏览型号Z8018008VSC的Datasheet PDF文件第191页浏览型号Z8018008VSC的Datasheet PDF文件第192页浏览型号Z8018008VSC的Datasheet PDF文件第193页浏览型号Z8018008VSC的Datasheet PDF文件第195页浏览型号Z8018008VSC的Datasheet PDF文件第196页浏览型号Z8018008VSC的Datasheet PDF文件第197页浏览型号Z8018008VSC的Datasheet PDF文件第198页  
Z8018x Family  
MPU User Manual  
179  
Bit  
Position Bit/Field R/W  
Value Description  
6
Z
R/W  
0
Zero.  
Z is set to 1 when instruction execution produces 0 result.  
Otherwise, Z is reset to 0.  
5
4
Not Used ?  
H
?
Not used  
R/W  
0
Half Carry.  
H is used by the DAA (Decimal Adjust Accumulator)  
instruction to reflect borrow or carry from the least  
significant 4 bits and thereby adjust the results of BCD  
addition and subtraction.  
3
2
Not Used ?  
P/V  
?
Not used.  
R/W  
0
P/V: Parity/Overflow.  
P/V serves a dual purpose. For logical operations P/V is  
set to 1 if the number of 1 bit in the result is even and P/V  
is reset to 0 if the number of 1 in the result is odd. For two  
complement arithmetic, P/V is set to 1 if the operation  
produces a result which is outside the allowable range  
(+ 127 to -128 for 8-bit operations, + 32767 to - 32768 for  
16-bit operations).  
1
0
N
C
R/W  
R/W  
0
0
Negative.  
N is set to 1 if the last arithmetic instruction was a subtract  
operation (SUB, DEC, CP, etc.) and N is reset to 0 if the  
last arithmetic instruction was an addition operation (ADD,  
INC, etc.).  
Carry.  
C is set to 1 when a carry (addition) or borrow (subtraction)  
from the most significant bit of the result occurs. C is also  
affected by Accumulator logic operations such as shifts  
and rotates.  
UM005001-ZMP0400  
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