Z8018x Family
MPU User Manual
144
allows a common baud rate of up to 512 Kbps to be selected. The BRG
can also be disabled in favor of an external clock on the CKA pin.
The Receiver and Transmitter subsequently divide the output of the BRG
(or the signal from the CKA pin) by 1, 16, or 64, under the control of the
DR bit in the CNTLB register, and the X1 bit in the ASCI Extension
Control REgister. To compute baud rate, use the following formulas:
Where:
BRG mode is bit 3 of the ASEXT register
PS is bit 5 of the CNTLB register
TC is the 16-bit value in the ASCI Time Constant register
If ss2.1.0 = 111, baud rate - f /Clock mode
CKA
else if BRG mode baud rate = f /(2*(TC+2)*Clock mode)
PHI
else baud rate -f /((10 + 20*PS) * 2^ss*Clock mode)
PHI
The TC value for a given baud rate is:
TC = (f /*2*baud rate*Clock mode)) -2
PHI
Clock mode depends on bit 4 in ASEXT and bit 3 in CNTLB, as
described in Table 20.
Table 20.Clock Mode Bit Values
X1
DR
Clock Mode
0
0
1
1
0
1
0
1
16
64
1
Reserved, do not use
UM005001-ZMP0400
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