9 INSTRUCTION SET
Instruction
Code
Description
E.T.(fOSC
=270
KHZ)
RS R/ D7 D6 D5 D4 D3 D2 D1 D0
W
Clear
Display
0
0
0
0
0
0
0
0
0
1 Write”20H” to DDRAM and set DDRAM
address to “00H” from AC
1.53 ms
Return
Home
0
0
0
0
0
0
0
0
1
-- Sets DD RAM address to “00H” from AC
and return cursor to its original position if
shifted. The contents of DDRAM are not
changed.
1.53 ms
Entry Mode 0
SET
0
0
0
0
0
0
0
0
0
0
0
1
1 I/D SH Assign cursor moving direction and enable
the shift of entire display.
39 µS
39 µS
Display
ON/OFF
Control
0
0
0
D
C
B Set display (D), cursor (C), and blink of
cursor (B) on/off control bit.
Cursor or
Display
Shift
0
0
0
0
0
0
0
1
S/ R/ -- -- Set cursor moving and display shift control
C
39 µS
39 µS
L
bit, and the direction, without changing of
DDRAM data.
Function
Set
1 DL N
F
-- -- Sets interface data length (DL:8-bit/4-bit),
number of display lines (N:2-line/1-line)
and , display font type (F:5x11dots/5x8
dost).
Set CG
RAM
Address
0
0
0
0
0
0
1 AC AC AC AC AC AC Sets CG RAM address in address counter.
39 µS
39 µS
0 µS
5
4
3
2
1
0
Set DD
RAM
Address
1 AC AC AC AC AC AC AC Sets DD RAM address in address counter.
6
5
4
3
2
1
0
Read Busy
Flag and
Address
1 BF AC AC AC AC AC AC AC Whether during internal operation or not
6
5
4
3
2
1
0 can be known by reading BF. The contents
of address counter can also be read.
Write Data
to RAM
1
1
0 D7 D6 D5 D4 D3 D2 D1 D0 Writes data into internal RAM (DD RAM
/CG RAM).
43 µS
43 µS
Read Data
from RAM
1 D7 D6 D5 D4 D3 D2 D1 D0 Reads data from internal RAM (DD RAM
/CG RAM).
* “--“ : don’t care
Note : When an MPU program with checking the Busy Flag(DB7) is made, it must be
necesssary1/2Fosc is necessary for executing the next instruction by the falling edge of the ‘E’
signal after the Busy Flag(DB7) goes to “LOW”.
Date : 2001/12/12
AMPIRE CO., LTD.
12