欢迎访问ic37.com |
会员登录 免费注册
发布采购

MT9196AS1 参数 Datasheet PDF下载

MT9196AS1图片预览
型号: MT9196AS1
PDF下载: 下载PDF文件 查看货源
内容描述: 综合数字电话电路( IDPC ) [Integrated Digital Phone Circuit (IDPC)]
分类和应用: 电话电路PC
文件页数/大小: 46 页 / 636 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
 浏览型号MT9196AS1的Datasheet PDF文件第2页浏览型号MT9196AS1的Datasheet PDF文件第3页浏览型号MT9196AS1的Datasheet PDF文件第4页浏览型号MT9196AS1的Datasheet PDF文件第5页浏览型号MT9196AS1的Datasheet PDF文件第6页浏览型号MT9196AS1的Datasheet PDF文件第7页浏览型号MT9196AS1的Datasheet PDF文件第8页浏览型号MT9196AS1的Datasheet PDF文件第9页  
MT9196
Integrated Digital Phone Circuit (IDPC)
Data Sheet
Features
Programmable m-Law/A-Law CODEC and
Filters
Programmable CCITT (G.711)/sign-magnitude
coding
Programmable transmit, receive and side-tone
gains
Digital DTMF and single tone generation
Fully differential interface to handset
transducers
Auxiliary analog interface
Interface to ST-BUS/SSI (compatible with GCI)
Serial microport control
Single 5 volt supply, low power operation
Anti-howl circuit for group listening
speakerphone applications
The MT9196 Integrated Digital Phone Circuit (IDPC) is
designed for use in digital phone products. The device
incorporates a built-in Filter/Codec, digital gain pads,
DTMF generator and tone ringer. Complete telephony
interfaces are provided for connecting to handset and
speakerphone transducers. Internal register access is
provided through a serial microport compatible with
various industry standard micro-controllers.
The device is fabricated in Zarlink's ISO
2
-CMOS
technology ensuring low power consumption and high
reliability.
Filter/Codec Gain
Encoder
Decoder
7dB
-7dB
Transducer
Interface
January 2006
ISO
2
-CMOS
Ordering Information
MT9196AP
28 Pin PLCC
Tubes
MT9196AE
28 Pin PDIP
Tubes
MT9196AS
28 Pin SOIC
Tubes
MT9196ASR
28 Pin SOIC
Tape &
MT9196APR
28 Pin PLCC
Tape &
MT9196AE1
28 Pin PDIP*
Tubes
MT9196APR1 28 Pin PLCC*
Tape &
MT9196AP1
28 Pin PLCC*
Tubes
MT9196AS1
28 Pin SOIC*
Tubes
MT9196ASR1 28 Pin SOIC*
Tape &
*Pb Free Matte Tin
-40°C to +85°C
Reel
Reel
Reel
Reel
Description
Applications
Digital telephone sets
Wireless telephones
Local area communications stations
Digital Gain & Tone Generator
VSSD
VDD
VSSA
VSS SPKR
VBias
VRef
21/ - 24dB
∆3.0dB
Tx & Rx
AUXin
AUXout
MIC +
M-
M+
HSPKR +
HSPKR -
Din
Timing
Dout
STB/F0i
CLOCKin
Serial Microport
XSTL2
IC
IRQ
CS
DATA1
DATA2
SCLK
Flexible
Digital
Interface
SPKR +
SPKR -
ST-BUS
C&D
Channels
WD
PWRST
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1995-2005, Zarlink Semiconductor Inc. All Rights Reserved.