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MT9196AS 参数 Datasheet PDF下载

MT9196AS图片预览
型号: MT9196AS
PDF下载: 下载PDF文件 查看货源
内容描述: 综合数字电话电路( IDPC ) [Integrated Digital Phone Circuit (IDPC)]
分类和应用: 电话电路PC
文件页数/大小: 46 页 / 636 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MT9196
Data Sheet
M+
M-
VSSA
MIC+
AUXin
VRef
VBias
PWRST
IC
VSSD
CS
SCLK
DATA1
DATA2
4 3 2 1 28 27 26
5
25
24
6
7
23
22
8
21
9
20
10
11
19
12 13 14 15 16 17 18
AUXout
VSS SPKR
SPKR+
SPKR-
HSPKR+
HSPKR-
VDD
WD
IRQ
Dout
Din
STB/F0i
CLOCKin
XSTAL2
M-
M+
VBias
VRef
PWRST
IC
VSSD
CS
SCLK
DATA1
DATA2
WD
IRQ
Dout
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VSSA
MIC+
AUXin
AUXout
VSS SPKR
SPKR+
SPKR-
HSPKR+
HSPKR-
VDD
XSTAL2
CLOCKin
STB/F0i
Din
28 PIN PLCC
28 PIN SOIC/PDIP
Figure 2 - Pin Connections
Pin Description
Pin #
1
2
3
4
5
6
7
8
9
10
Name
M-
M+
V
Bias
V
Ref
PWRST
IC
V
SSD
CS
SCLK
DATA1
Description
Inverting Microphone (Input).
Inverting input to microphone amplifier from the handset
microphone.
Non-Inverting Microphone (Input).
Non-inverting input to microphone amplifier from the
handset microphone.
Bias Voltage (Output).
(V
DD
/2) volts is available at this pin for biasing external amplifiers.
Connect 0.1
µF
capacitor to V
SSA
.
Reference voltage for codec (Output).
Nominally [(V
DD
/2)-1.5] volts. Used internally.
Connect 0.1
µF
capacitor to V
SSA
.
Power-up Reset (Input).
CMOS compatible input with Schmitt Trigger (active low).
Internal Connection.
Tie externally to V
SS
for normal operation.
Digital Ground.
Nominally 0 volts.
Chip Select (Input).
This input signal is used to select the device for microport data
transfers. Active low. TTL level compatible.
Serial Port Synchronous Clock (Input).
Data clock for microport. TTL level compatible.
Bidirectional Serial Data.
Port for microprocessor serial data transfer. In Motorola/National
mode of operation, this pin becomes the data transmit pin only and data receive is
performed on the DATA2 pin. TTL level compatible input levels.
Serial Data Receive.
In Motorola/National mode of operation, this pin is used for data
receive to the IDPC. In Intel mode, serial data transmit and receive are performed on the
DATA1 pin and DATA2 is disconnected. Input level TTL compatible.
Watchdog (Output).
Watchdog timer output. Active high.
Interrupt Request (Open Drain Output).
Low true interrupt output to microcontroller.
11
DATA2
12
13
WD
IRQ
2
Zarlink Semiconductor Inc.