MT88V32
Data Sheet
AC Electrical Characteristics† - Crosspoint Performance- Voltages are with respect to VDD=+5V, VDC=0, VEE=-7V, VSS=0V,
unlesss otherwise stated. Also applicable for VEE=VSS=0, VDD=+12V, VDC=(VDD+VEE)/2.
Characteristics
Sym. Min. Typ.‡ Max.
Units
Test Conditions
1 Xi to 1 Yi
1
2
3
4
5
6
On-state Xi capacitance1
On-state Yi capacitance2
Off-state Xi capacitance2
Off-state Yi capacitance2
Break-before-Make interval
CXi (on)
CYi (on)
CXi (off)
CYi (off)
topen
56
56
30
15
pF
pF
pF
pF
ns
1 Yi to 1 Xi
10
Single channel feedthrough
(all crosspoints open)
(see Fig. 8)
FDT
RS= RL=75Ω
VIN=0.6Vpp @ 5MHz
VIN=0.6Vpp @ 15MHz
-80
-62
dB
dB
7
Single channel feedthrough
(all crosspoints closed)
(See Fig. 9)
Xtalk
(sc)
RIN= 10Ω, RL= 10kΩ
VIN=0.6Vpp @ 5MHz
VIN=0.6Vpp @ 15MHz
-85
-68
dB
dB
Xtalk
(sc)
RIN= 75Ω, RL= 10kΩ
VIN=0.6Vpp @ 5MHz
VIN=0.6Vpp @ 15MHz
-70
-50
dB
dB
8
9
All channel crosstalk
(all crosspoints closed)
(See Fig. 10)
Xtalk
(ac)
-55
dB
RIN= 10Ω, RL= 10kΩ
VIN=0.6Vpp @ 5MHz
Frequency Response
(see Fig.11)
f3dB
DP
200
0.05
0.11
MHz RS= RL=50Ω
o
10 Differential Phase Error
See Note 1, RS= 50Ω,
RL= 75Ω
See Note 1, RS= 50Ω,
RL= 75Ω
11 Differential Gain Error
DG
%
† Timing is over recommended temperature range.
‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.
Notes:
1 Valid for VEE=-7V, VDD=+5V and VDC=-2.0V. Error will increase slightly if input is biased differently.
Input test signal: 700mV ramp biased @ -2.0 Vdc with a superimposed video signal of 285Vrms @ 3.58 MHz.
2 Guaranteed by design and characterization and not subject to production testing.
15
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
