MT88E43
Dual Tone Detection Guard Time
When the dual tone alert signal is detected by the
MT88E43, ESt goes high. When the alerting signal
ceases to be detected, ESt goes low.
The ESt pin signals raw detection of CAS/Alerting
Tones. Since both Bellcore and BT applications
require a minimum duration for valid signals, ESt
detection must be guard time qualified. The StD pin
provides guard time qualified CAS/Alerting Tone
detection. When the MT88E43 is used in a caller
identity system, StD indicates correct CAS/Alerting
Tone detection.
Figure 4 shows the relationship between the St/GT,
ESt and StD pins. It also shows the operation of a
guard time circuit.
The total recognition time is t
REC
= t
GP
+ t
DP
, where
t
GP
is the tone present guard time and t
DP
is the tone
present detect time (refer to timing between ESt, St/
GT and StD in Figures 17 and 20).
The total tone absent time is t
ABS
= t
GA
+ t
DA
, where
t
GA
is the tone absent guard time and t
DA
is the tone
absent detect time (refer to timing between ESt, St/
GT and StD in Figures 17 and 20).
Bellcore states that it is desirable to be able to turn
off CAS detection for an off-hook capable CPE. The
disable switch allows the subscriber who
disconnects a service that relies on CAS detection
(e.g., CIDCW) but retains the CPE, to turn off the
detector and not be bothered by false detection.
When SW1 in Figure 4 is in the B position the guard
time circuit is disabled. The detector will still process
CAS/Alerting tones but the MT88E43 will not signal
their presence by ensuring StD is low.
BT specifies that the idle state tone alert signal
recognition time should not be less than 20ms when
both tones are used for detection. That is, both tones
must be detected together for at least 20ms before
the signal can be declared valid. This requirement
can be met by setting the t
GP
(refer to Figure 5) to at
least 20ms.
BT also specifies that the TE is required to apply a
D.C. wetting pulse and an AC load 15-25ms after the
end of the alerting signal. If t
ABS
=t
DA
+t
GA
is 15 to
25ms, the D.C. current wetting pulse and the A.C.
load can both be applied at the falling edge of StD.
The maximum
t
DA
is 8ms so t
GA
should be 15-17ms.
Therefore, t
GP
must be greater than t
GA
. Figure 5(a)
shows a possible implementation. The values in
5-58
Preliminary Information
Figures 9 and 11 (R2=R3=422K, C=0.1µF) will meet
the BT timing requirements.
MT88E43
Tones detected
From
detector
+
-
V
TGt
Comparator
N
P
V
DD
Q1
C
St/GT
R
Q2
= V
SS
A
ESt
StD
SW1
B
V
SS
Figure 4 - Guard Time Circuit Operation
MT88E43
V
DD
St/GT
R1
C
V
D
=diode forward voltage
R2
ESt
(a) t
GP
> t
GA
t
GP
= R1C ln [V
DD
/(V
DD
-V
TGt
)]
t
GA
= R
P
C ln [(V
DD
-V
D
(R
P
/R2))/(V
TGt
-V
D
(R
P
/R2))]
R
P
= R1R2/(R1+R2)
MT88E43
V
DD
St/GT
R1
C
V
D
=diode forward voltage
R2
ESt
(b) t
GP
< t
GA
t
GP
= R
P
C ln [V
DD
-V
D
(R
P
/R2))/(V
DD
-V
TGt
-V
D
(R
P
/R2))]
t
GA
= R1C ln (V
DD
/V
TGt
)
R
P
= R1R2/(R1+R2)
Figure 5 - Guard Time Circuits with
Unequal Times
Input Configuration
The MT88E43 provides an input arrangement
comprised of an operational amplifier and a bias
source (V
Ref
); which is used to bias the opamp inputs
at V
DD
/2
. The feedback resistor at the opamp output
(GS) can be used to adjust the gain. In a single-
ended configuration, the opamp is connected as
shown in Figure 6. For a differential input
configuration, Figure 7 shows the necessary
connections.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
