MT88E43B
Data Sheet
CPE unmutes handset
CPE goes off-hook
CPE mutes handset & disables keypad
CPE sends
and enables keypad
Data
Mark
CAS
ACK
Packet
TIP/RING
PWDN
Note 1
A
C
E
G
B
D
Note 5
F
Note 2
Note 3
Note 4
FSKen
tPU
OSCout
tDP
tDA
ESt
tGA
VTGt
tGP
St/GT
tABS
tREC
StD (Note 6)
CD
tCP
tCA
Note 7
Note 8
A = 75-85ms
B = 0-100ms
C = 55-65ms
D = 0-500ms
E = 58-75ms
F = feature specific
G ≤ 50ms
DR
DCLK
DATA
Data
Figure 20 - Input and Output Timing for Bellcore Off-hook Data Transmission, e.g., CIDCW
Notes:
1) In a CPE where AC power is not available, the designer may choose to switch over to line power when the CPE goes off-hook and
use battery power while on-hook. The CPE should also be CID (on-hook) capable because TR-NWT-000575 specifies that CIDCW
will be offered only to lines which subscribe to CID.
2) Non-FSK signals such as CAS, speech and DTMF tones are in the same frequency band as FSK. They will be demodulated and give
false data. The FSKen pin should be set low to disable the FSK demodulator when FSK is not expected.
3) FSKen may be set high as soon as the CPE has finished sending the acknowledgment signal ACK. TR-NWT-000575 specifies that
ACK = DTMF D for non-ADSI CPE, A for ADSI CPE.
4) FSKen should be set low when CD has become inactive.
5) In an unsuccessful attempt where the end office does not send the FSK signal, the CPE should unmute the handset and enable the
keypad after this interval.
6) SR-TSV-002476 states that it is desirable that the CPE have an on/off switch for the CAS detector. See SW1 in Figure 4.
7) The total recognition time is tREC = tGP + tDP, where tGP is the tone present guard time and tDP is the tone present detect time (refer
to section “Dual Tone Detection Guard Time” on page 6 for details). VTGt is the comparator threshold (refer to Figure 4).
8) The total tone absent time is tABS = tGA + tDA, where tGA is the tone absent guard time and tDA is the tone absent detect time (refer to
section “Dual Tone Detection Guard Time” on page 6 for details). VTGt is the comparator threshold (refer to Figure 4).
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Zarlink Semiconductor Inc.