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MT8885E 参数 Datasheet PDF下载

MT8885E图片预览
型号: MT8885E
PDF下载: 下载PDF文件 查看货源
内容描述: [DTMF Signaling Circuit, CMOS, PDIP24,]
分类和应用: 电信光电二极管电信集成电路
文件页数/大小: 28 页 / 498 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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MT8885  
Data Sheet  
EXPLANATION OF EVENTS  
A)  
B)  
C)  
TONE BURSTS DETECTED, TONE DURATION INVALID, RX DATA REGISTER NOT UPDATED.  
TONE #n DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN RX DATA REGISTER.  
END OF TONE #n DETECTED, TONE ABSENT DURATION VALID, INFORMATION IN RX DATA REGISTER  
RETAINED UNTIL NEXT VALID TONE PAIR.  
D)  
E)  
F)  
TONE #n+1 DETECTED, TONE DURATION VALID, TONE DECODED AND LATCHED IN RX DATA REGISTER.  
ACCEPTABLE DROPOUT OF TONE #n+1, TONE ABSENT DURATION INVALID, DATA REMAINS UNCHANGED.  
END OF TONE #n+1 DETECTED, TONE ABSENT DURATION VALID, INFORMATION IN RX DATA REGISTER  
RETAINED UNTIL NEXT VALID TONE PAIR.  
EXPLANATION OF SYMBOLS  
V
DTMF COMPOSITE INPUT SIGNAL.  
in  
ESt  
St/GT  
RX -RX  
0
EARLY STEERING OUTPUT. INDICATES DETECTION OF VALID TONE FREQUENCIES.  
STEERING INPUT/GUARD TIME OUTPUT. DRIVES EXTERNAL RC TIMING CIRCUIT.  
4-BIT DECODED DATA IN RECEIVE DATA REGISTER  
3
b3  
DELAYED STEERING IN STATUS REGISTER (BIT 3) INDICATES THAT VALID FREQUENCIES HAVE BEEN  
PRESENT/ABSENT FOR THE REQUIRED GUARD TIME THUS CONSTITUTING A VALID SIGNAL. ACTIVE LOW  
FOR THE DURATION OF A VALID DTMF SIGNAL.  
b2  
RECEIVE DATA REGISTER FULL (BIT 2) IN STATUS REGISTER INDICATES THAT VALID DATA IS IN THE  
RECEIVE DATA REGISTER. THE BIT IS CLEARED AFTER THE STATUS REGISTER IS READ.  
INTERRUPT IS ACTIVE INDICATING THAT NEW DATA IS IN THE RX DATA REGISTER. THE INTERRUPT IS  
CLEARED AFTER THE STATUS REGISTER IS READ.  
IRQ/CP  
t
t
t
t
t
t
t
t
MAXIMUM DTMF SIGNAL DURATION NOT DETECTED AS VALID. TYPICALLY 20 MS.  
MINIMUM DTMF SIGNAL DURATION REQUIRED FOR VALID RECOGNITION. TYPICALLY 40 MS.  
MINIMUM TIME BETWEEN VALID SEQUENTIAL DTMF SIGNALS. TYPICALLY 40 MS.  
MAXIMUM ALLOWABLE DROPOUT DURING VALID DTMF SIGNAL. TYPICALLY 20 MS.  
TIME TO DETECT VALID FREQUENCIES PRESENT.  
TIME TO DETECT VALID FREQUENCIES ABSENT.  
GUARD TIME, TONE PRESENT.  
GUARD TIME, TONE ABSENT.  
REC  
REC  
ID  
DO  
DP  
DA  
GTP  
GTA  
Figure 9 - Description of Timing Events  
DTMF signals cannot be detected if CP mode has been selected (see Table 7). Figure 8 indicates the useful detect  
bandwidth of the call progress filter. Frequencies presented to the input, which are within the ‘accept’ bandwidth  
limits of the filter, are hard-limited by a high gain comparator with the IRQ/CP pin serving as the output. The  
squarewave output obtained from the schmitt trigger can be analyzed by a microprocessor or counter arrangement  
to determine the nature of the call progress tone being detected. Frequencies which are in the ‘reject’ area will not  
be detected and consequently the IRQ/CP pin will remain low.  
3.0 DTMF Generator  
The DTMF transmitter employed in the MT8885 is capable of generating all sixteen standard DTMF tone pairs with  
low distortion and high accuracy. All frequencies are derived from an external 3.579545 MHz crystal. The sinusoidal  
waveforms for the individual tones are digitally synthesized by using row and column programmable dividers and  
switched capacitor D/A converters. The row and column tones are mixed and filtered to provide a DTMF signal with  
low total harmonic distortion and high accuracy. To specify a DTMF signal, data conforming to the encoding format  
shown in Table 1 must be written to the transmit Data Register. Note that Table 1 is the same as the receiver  
output code. The individual tones which are generated (fLOW and fHIGH) are referred to as Low Group and High  
Group tones. As seen from the table, the low group frequencies are 697, 770, 852 and 941 Hz. The high group  
frequencies are 1209, 1336, 1477 and 1633 Hz. Typically, the high group to low group amplitude ratio (twist) is 2 dB  
to compensate for high group attenuation on long loops.  
The period of each tone consists of 32 equal time segments. The period of a tone is controlled by varying the length  
of these time segments. During write operations to the Transmit Data Register the 4 bit data on the bus is latched  
and converted to 2 of 8 coding for use by the programmable divider circuitry. This code is used to specify a time  
segment length which will ultimately determine the frequency of the tone. When the divider reaches the appropriate  
9
Zarlink Semiconductor Inc.