MT3170B/71B, MT3270B/71B, MT3370B/71B
stated.
Data Sheet
AC Electrical Characteristics
- voltages are with respect to V
DD
=5V
±
5%, V
SS
=0V and temperature -40 to +85
°
C unless otherwise
Characteristics
18
19
20
21
22
Interdigit pause accept (DStD
logic output)
Interdigit pause reject (DStD
logic output)
Data shift rate 40-60% duty cycle
Propagation delay
(ACK to Data Bit)
Sym.
t
ID
t
DO
f
ACK
t
PAD
20
1.0
100
3.0
140
Min.
Typ.
‡
Max.
40
Units
ms
ms
MHz
ns
Test Conditions*
MT3x71B
MT3x71B
13,15
1MHz f
ACK
,
13,15
13,15
‡
* Test Conditions
30
50
ns
Data hold time (ACK to SD)
t
DH
Typical figures are at 25
°
C and are for design aid only: not guaranteed and not subject to production testing
1. dBm refers to a reference power of 1 mW delivered into a 600 ohms load.
2. Data sequence consists of all DTMF digits.
3. Tone on = 40 ms, tone off = 40 ms.
4. Signal condition consists of nominal DTMF frequencies.
5. Both tones in composite signal have an equal amplitude.
6. Tone pair is deviated by
±
1.5%
±
2 Hz.
7. Bandwidth limited (0-3 kHz) Gaussian noise.
8. Precise dial tone frequencies are 350 Hz and 440 Hz (
±
2%).
9. Referenced to lowest level frequency component in DTMF signal.
10. Referenced to the minimum valid accept level.
11. Both tones must be within valid input signal range.
12. External guard time for MT3x70B = 20 ms.
13. Timing parameters are measured with 70pF load at SD output.
14. Time duration between PWDN pin changes from ‘1‘ to ‘0‘ and ESt/DStD becomes active.
15. Guaranteed by design and characterization. Not subject to production testing.
16. Value measured with an applied tone of 450 Hz.
10
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
