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MGCM02KG 参数 Datasheet PDF下载

MGCM02KG图片预览
型号: MGCM02KG
PDF下载: 下载PDF文件 查看货源
内容描述: TDMA / AMPS IF和基带接口 [TDMA/AMPS IF and Baseband Interface]
分类和应用:
文件页数/大小: 21 页 / 499 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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Data Sheet  
MGCM02  
Operating Description  
Receive  
AMPS FM Mode  
FM demodulation can be done using the I and Q  
baseband signals if supported by the baseband  
however the MGCM02 contains a FM demodulator.  
Basic Architecture  
In FM mode the baseband I and Q output stages are  
disabled and the 60 kHz IF signal from the bandpass  
lter is input to a limiting amplier and FM  
discriminator. The FM discriminator consists of a  
shift register acting as a delay line. The output of the  
discriminator is a digital signal which must be ltered  
to recover the audio signal. The discriminator output  
is routed through the cascaded baseband I and Q  
low pass smoothing lters and nally through an  
output buffer stage. The cut-off frequency of the low  
pass switched capacitor lters can be set at 25kHz  
for optimum ltering. External components can be  
used to optimise the gain and frequency response of  
the output amplier.  
The MGCM02 provides a highly integrated receive  
solution for dual mode IS136/AMPS mobile  
telephones. The input to MGCM02 is normally from  
the output of the rst IF lter. The signal is amplied  
by  
a
variable gain amplier before being  
downconverted in a quadrature mixer to a low IF of  
60kHz as I (In phase) and Q (Quadrature) signals.  
The local oscillator for this mixer is generated from  
an on chip VCO using external tank components.  
This oscillator operates at twice the LO frequency to  
allow the generation of accurate quadrature LO  
signals for the mixer. High side or low side LO  
injection is programmable. Further stages of voltage  
controlled gain are then provided at 60kHz with  
matched ampliers in the I and Q channels.  
There are two methods of controlling the amplier  
gain in FM Mode.  
Gain control is provided from an external analogue  
control signal. This signal is digitised by an on chip 8  
bit analog to digital converter. The digital outputs are  
then used to control the ampliers. Figure 2 shows  
the amplier conguration in more detail. The  
preamplier has 4 gain settings and there are four  
amplier stages at 60 kHz each providing -12 to  
+12dB gain in 0.5 dB steps. The gain control range  
will be more than adequate for most TDMA  
applications. The digitally controlled ampliers  
provide a highly accurate and linear control of gain.  
The conversion rate of the analog to digital converter  
is 45 kHz.  
1) Fixed gain. The amplier gain is set to a preset  
level.This gain level (Pre-amplier and VGA gain  
= 26dB) allows the minimum sensitivity  
requirements to be met, but at high signal levels  
the gain is automatically reduced by 32.5 dB.  
This optimises the signal levels through the  
bandpass lter preventing overload and  
excessive phase distortion. Further details on  
this are given in the following RSSI section.  
2) AGC Control. In this mode the gain is controlled  
by the VGA control input. The RSSI level is  
monitored by the baseband controller and the  
gain level set appropriately. This mode gives  
improved performance in strong fading  
environments.  
The I and Q signals are then combined and passed  
through a switched capacitor polyphase bandpass  
lter. This lter is a fth order Chebyshev. The  
advantage of using a switched capacitor lter is that  
it gives very stable performance and no calibration is  
required. The circuit also provides rejection of the  
image frequency following the down conversion to  
60kHz.  
RSSI  
The MGCM02 also contains RSSI circuitry. This  
would normally be used when using the FM  
discriminator to provide the received signal strength  
to the phone microcontroller. This RSSI circuit has  
over 70dB dynamic range.  
TDMA IS136 Mode  
Following the bandpass lter the signal is mixed  
down to baseband I and Q signals which are output  
from differential outputs. There is additional  
baseboard ltering to remove spurii from the  
downconverters and clock breakthrough from the  
switched capacitor lters. Further detail of the  
MGCM02 receive path is shown in Fig 2. The  
baseboard outputs can be fed directly into analog to  
digital converters in a baseband circuit.  
A block diagram of the RSSI circuit is shown in gure  
5. The switched capacitor lter has a limited dynamic  
range of approximately 50dB due to aliased noise  
from the sampling process used. In order to enable  
the RSSI to operate over a larger dynamic range  
gain control is required in the ampliers before the  
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