MGCM02
Data Sheet
Pad Assignment
No
Pin Name
Type
Description
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
C1
C2
C3
C4
C5
C6
C7
D1
D2
D3
D4
D5
D6
D7
E1
RTUNE
VBG
Bias Reference - connect 100kΩ to ground
Bandgap Reference Decoupling
Power Control Assert
PCA
Input
Input
SDATA
VDD
Serial Interface, Serial Data In
Power Supply - Digital
Power
Input
TCXO
19.44MHz Reference from TCXO
Ground - Transmit Section
Baseband Receive I Output +
Baseband Receive I Output -
Serial Interface, Clock
GND (TX)
RXI OP+
RXI OP-
SCLK
Ground
Output
Output
Input
GND
Input
Ground Digital
RESETB
TXQ IP-
TXQ IP+
RXQ OP-
GND
Input
Reset (active low)
Input
Transmit Q Input -
Input
Transmit Q Input +
Output
Ground
Input
Baseband Receive Q Output -
Ground - Receive Section
AGC control voltage
AGC
SLATCH
LOCK DET
TXI IP-
TXI IP+
RX IP+
RXQ OP+
GND
Input
Serial Interface, Latch
Output
Input
Synthesiser Lock Detect
Transmit I Input -
Input
Transmit I Input +
Input
Receive IF Input +
Output
Ground
Baseband Receive Q Output +
Ground (Substrate Connection)
Not Connected
NC
GND
Ground
Output
Power
Input
Ground (Substrate Connection)
Transmit I Output +
TXI OP+
VDD
Power Supply - Transmit Section
Receive IF Input -
RX IP-
2
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