MGCM02
Pad Assignment
No
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
C1
C2
C3
C4
C5
C6
C7
D1
D2
D3
D4
D5
D6
D7
E1
Pin Name
RTUNE
VBG
PCA
SDATA
VDD
TCXO
GND (TX)
RXI OP+
RXI OP-
SCLK
GND
RESETB
TXQ IP-
TXQ IP+
RXQ OP-
GND
AGC
SLATCH
LOCK DET
TXI IP-
TXI IP+
RX IP+
RXQ OP+
GND
NC
GND
TXI OP+
VDD
RX IP-
Ground
Output
Power
Input
Input
Input
Power
Input
Ground
Output
Output
Input
Input
Input
Input
Input
Output
Ground
Input
Input
Output
Input
Input
Input
Output
Ground
Type
Description
Data Sheet
Bias Reference - connect 100k
Ω
to ground
Bandgap Reference Decoupling
Power Control Assert
Serial Interface, Serial Data In
Power Supply - Digital
19.44MHz Reference from TCXO
Ground - Transmit Section
Baseband Receive I Output +
Baseband Receive I Output -
Serial Interface, Clock
Ground Digital
Reset (active low)
Transmit Q Input -
Transmit Q Input +
Baseband Receive Q Output -
Ground - Receive Section
AGC control voltage
Serial Interface, Latch
Synthesiser Lock Detect
Transmit I Input -
Transmit I Input +
Receive IF Input +
Baseband Receive Q Output +
Ground (Substrate Connection)
Not Connected
Ground (Substrate Connection)
Transmit I Output +
Power Supply - Transmit Section
Receive IF Input -
2
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