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MAS17503FEXXX 参数 Datasheet PDF下载

MAS17503FEXXX图片预览
型号: MAS17503FEXXX
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC]
分类和应用:
文件页数/大小: 35 页 / 650 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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APRIL 1995
MA17503
DS3566-3.4
MA17503
RADIATION HARD MIL-STD-1750A INTERRUPT UNIT
The MA17503 Interrupt Unit is a component of the MAS281
chip set. Other chips in the set include MA17501 Execution Unit
and the MA17502 Control Unit. Also available is the peripheral
MA31751 Memory Management/Block Protection Unit. The
lnterrupt Unit, in conjunction with these additional chips,
implements the full MIL-STD-1750A Instruction Set
Architecture.
The MA17503 - consisting of the Pending Interrupt
Register, Mask Register, Interrupt Priority Encoder, Fault
Register, Timer A, Timer B, Trigger-Go Counter, Bus Fault
Timer, and DMA interface - handles all interrupt fault, and DMA
interfacing, in addition to providing all three hardware timers.
The Interrupt Unit also implements 26 of the MIL-STD-1750A
specified l/O commands. Table 1 provides brief signal
definitions.
The MA17503 is offered in dual-in-line, flatpack or leadless
chip carrier packaging. Screening and packaging options are
described at the end of this document.
BLOCK DIAGRAM
FEATURES
s
Mil-Std-1750A Instruction Set Architecture
s
Full Performance over Military Temperature Range (-55°C
to +125°C)
s
Radiation Hard CMOS/SOS Technology
s
Interrupt Handler
• 9 User Interrupt Inputs
• Pending Interrupt Register
• Interrupt Mask Register
• Interrupt Priority Encoder
s
Fault Handler
• 8 User Faults Inputs
• Fault Register
s
Timers
• Timer A
• Timer B
s
Trigger-Go
s
DMA Interface
s
Interface Discretes
• Normal Power-Up
• Start-Up ROM Enable
• Configuration Word Enable
s
Implements 26 MIL-STD-1750A Specified l/O Commands
s
MAS281 Integrated Built-ln Self Test
s
TTL Compatible System Interface
1