Le87213A
Data Sheet
Transformer Turns Ratio
The transformer turns ratio N is restricted by the maximum peak differential signal at AY/BY pins, which must stay within the
Le87213A device's dynamic range. The output voltage range is typically equal to |VBATmin| – 4 V.
The maximum peak voltage (across 100 Ω at TIP (A) and RING (B) leads of a FDM ADSL signal using 224 downstream carriers
for a combined rms power of 19.85 dBm and a peak-to-rms ratio of 5.8) is 36.05 VPP differential. To account for the voltage drop
across ZSEC, this voltage must be scaled up by a factor of 1.086. The required peak differential signal at the AY/BY pins would
be 39.15 VPP or 19.6 VPP per driver if the transformer had a 1:1 turn ratio. Using this information the transformer turns ratio can
be calculated as
VBAT – 4V
19.6V
N =
------------------------------
.
The transformer turns ratio for a nominal battery voltage of –52 V is then N=2.45:1.
The Le87213A device is designed to operate with battery voltage in the range of –42 V to –72 V. The data transformer turns ratio
can be optimized for the specific battery voltage range, but the turns ratio must be limited to less than 2.7:1 secondary to primary
(where the primary side is connected to TIP (A) and RING (B)) if 19.85 dBm needs to be produced at the output. This limitation
is imposed by the Le87213A device internal bias levels.
Downstream Filtering
The input differential impedance (RDDWN) of the DDWNP/DDWNN pins can vary by as much as ± 30%, and consequently a lower
value external resistor R1 is used to set the differential input impedance (refer to the data path reference design).
A high-pass filter with a –3 dB corner frequency of
1
fDWNHPF = --------------------------
2πRINCIN
is formed by C1 and C2 in conjunction with RIN to attenuate the low frequency noise of the downstream signal
where
RIN = R10 + R11 + (R1 || RDDWN
)
C1 ⋅ C2
C1 + C2
CIN = --------------------
.
In addition to rejecting the low frequency signals from the data AFE, the input capacitors also block DC currents from flowing
between DDWNP/DDWNN and the data AFE outputs. With the recommended R1 value of 5.49 kΩ, R10 = R11 = 2.67 kΩ and
C1 = C2 = 1.5 nF provides a corner frequency of around 25 kHz. Resistors R10, R11 and R1 can be used to adjust the downstream
signal level.
Figure 3. Downstream Gain of the Application Circuit, on page 8
25
20
15
10
5
db(VLOOP/VTX)
ZLOOP=100 ohms
0
10K
100K
1000K
Frequency Hz
10000K
RECEIVER AND HYBRID CIRCUIT
The receive and hybrid circuit architecture depends greatly on the data AFE being used in the design. Some data AFEs have
built-in input differential amplifiers for the receive circuits. These amplifiers should be used to implement the receive and hybrid
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Zarlink Semiconductor Inc.