Le79228
No.
23
24
25
Item
Gain from VSAB
1
–VSAB
4
to VHL
1
–
VHL
4
(KRFB)
VSAB
1
–VSAB
4
to VHL
1
–VHL
4
output
offset (KRFB)
Gain from VSAB
1
–VSAB
4
to VHL
1
–
VHL
4
% error of VLB
1
–VLB
4
voltage (For
VLB equation, see the
Chip Set User’s
Guide)
Capacitance load on VLB
1
–VLB
4
Capacitance load on XSB
1
–XSB
4
,
XSC
One channel active
(VE790 series ISLIC
state register set to
active); three channels
inactive (VE790 series
ISLIC state register set
to Standby)
29
Power Dissipation
All channels active
(VE790 series ISLIC
state register set to
Active)
All channels inactive
(VE790 series ISLIC
state register set to
Standby)
VFD = 0, hook bit
feedback
% of input voltage
Condition
VFD = 1
Min
–4.8
–50
–
Typ
–5
0
–
0.128
Data Sheet
Max
–5.2
50
–
Unit
V/V
mV
V/V
Note
26
27
28
–5
0
0
0
—
—
+5
120
400
%
pF
—
183
235
mW
—
264
340
—
143
188
Transmission Specifications
Table 1. 0 dBm0 Voltage Definitions with Unity Gain in X, R, GX, GR, AX, and AR
Signal at Digital Interface
A-law digital mW or equivalent (0 dBm0)
µ-law digital mW or equivalent (0 dBm0)
±5,800 peak linear coded sine wave
Transmit
0.5026
0.4987
0.5026
Receive
0.5026
0.4987
0.5025
Vrms
Unit
Note: Expressed voltage levels on VOUT or input to VIN are equivalent to a digital milliwatt on the digital interface.
13
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
