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LE79Q2281DVC 参数 Datasheet PDF下载

LE79Q2281DVC图片预览
型号: LE79Q2281DVC
PDF下载: 下载PDF文件 查看货源
内容描述: [PCM Codec, A/MU-Law, 1-Func, CMOS, PQFP64, GREEN, MS-026ACD, TQFP-64]
分类和应用: PC电信电信集成电路
文件页数/大小: 38 页 / 620 K
品牌: ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
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A
Quad Intelligent Subscriber Line Audio-processing Circuit
VE790 Series
Voice Solution
ORDERING INFORMATION
Device
Le79Q2281DVC
Le79Q2284MVC
1.
Package
1
64-pin TQFP
(Green)
80-pin LQFP
(Green)
Tray
Tray
Packing
2
Le79228
APPLICATIONS
Voice over IP/DSL
Integrated Access Devices (IAD),
Smart Residential Gateways (SRG), Home Gateway/
Router
Cable Telephony
— NIU, Set-Top Box, Home Side
Box, Cable Modem, Cable PC
Fiber
— Fiber in the Loop (FITL), Fiber to the
Home (FTTH)
Wireless Local Loop, Intelligent PBX
DLC-MUX
CO
The green package meets RoHS Directive 2002/95/EC of the
European Council to minimize the environmental impact of
electrical equipment.
For delivery using a tape and reel packing system, add a "T" suffix
to the OPN (Ordering Part Number) when placing an order.
2.
DESCRIPTION
The Le79228 Quad Intelligent Subscriber Line Audio-
processing Circuit (ISLAC™) device, in combination with a
VE790 series ISLIC™ device, implements a four-channel
universal telephone line interface. This enables the design of a
s i n g l e , l o w c o s t , h i g h p e r f o r m a n c e , f u l l y s o ft w a r e
programmable line interface for multiple country applications.
All AC, DC, and signaling parameters are fully programmable
via microprocessor or GCI interfaces. Additionally, the
Le79228 Quad ISLAC device has integrated self-test and line-
test capabilities to resolve faults to the line or line circuit. The
integrated test capability is crucial for remote applications
where dedicated test hardware is not cost effective.
FEATURES
High performance digital signal processor provides
programmable control of all major line card functions
— A-law/µ-law and linear codec/filter
– Transmit and receive gain
– Two-wire AC impedance
– Transhybrid balance
– Equalization
— DC loop feeding
– Smooth or abrupt polarity reversal
— Loop supervision
– Off-hook debounce circuit
– Ground-key and ring-trip filters
— Internal ringing generation and integrated ring-trip
detection
— Adaptive hybrid balance
— Line and circuit testing
– Meets GR-909 and GR-844 test requirements
— Tone generation (DTMF, FSK, random noise, and
arbitrary tone)
— Metering generation at 12 kHz and 16 kHz
– Envelope shaping and level control
— Modem Tone Detection
Selectable PCM/MPI or GCI digital interfaces
— Supports most available master clock frequencies from
512 kHz to 8.192 MHz
General purpose I/O pins
+3.3 V DC operation
Exceeds LSSGR and ITU requirements
Supports external ringing with on-chip ring-trip circuit
— Automatic or manual ring-trip modes
Supports CallerNumber Identification (CID) tone
generation
RELATED LITERATURE
081237 Le79232 Dual ISLIC™ Device Data Sheet
081152 Le79242 Dual ISLIC™ Device Data Sheet
081185 Le79252 Dual ISLIC™ Device Data Sheet
081191 Le75282 Dual LCAS Device Data Sheet
080923 Le792x2 Le79228 Chip Set User’s Guide
081151 Le79112 VCP Device Data Sheet
BLOCK DIAGRAM
4
14
VCCA
VCCD
A1
B1
Dual ISLIC
A2
B2
A3
B3
Dual ISLIC
A4
B4
P1-P3
LD3
LD4
RREF
4
LD1
2
LD2
VREF
4
2
DGND
Protection
and LCAS or
EMR for
External Ringing
AGND
14
I/O1 - I/O4
TSCA/G
TSCB
DRA/DD
DRB
Quad ISLAC
DXB
DXA/DU
DCLK/S0
PCLK/FS
MCLK
External
Ringing
Sense
Resistors
5
RSHB
BATH
RSLB
BATL
RSPB
BATP
FS/DCL
CS/RST
DIO/S1
INT
NOTE: On August 3, 2007, Zarlink Semiconductor acquired the products and
technology of Legerity Holdings.
Document ID#
081256
Date:
Sep 19, 2007
Rev:
G
Version:
2
Distribution:
Protected Document