Le79489
Table 1. SLIC Decoding
DET Output
State
0
1
2
3
4
5
6
7
C3 C2 C1
0
0
0
0
1
1
1
1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
2-Wire Status
Standby, Reverse Polarity
Reserved
Active, Reverse Polarity
Tip Open
Disconnect
Ringing
Active, Normal
Standby, Normal
E1 = 1
Loop detector
X
Loop detector
GK or loop detector
Ring trip
Ring trip
Loop detector
Loop detector
E1 = 0
GK
X
GK
GK
Ring trip
Ring trip
GK
GK
Data Sheet
Table 2. User-Programmable Components
Z
T
=
253
(
Z
2WIN
– 2R
F
)
Z
T
is connected between the VTX and RSN pins. The fuse resistors
are R
F
, and Z
2WIN
is the desired two-wire AC input impedance.
When computing Z
T
, the internal current amplifier pole and any
external stray capacitance between VTX and RSN must be taken
into account. The internal amplifier pole is:
22 kHz
•
R
LAC
-------------------------------------
600
Ω ±
10%
Z
L
500
(
Z
T
)
-
-
Z
RX
= -----------
•
--------------------------------------------------
G
42L
Z
T
+
253
(
Z
L
+ 2R
F
)
625
(
GFA
)
I
LIMIT
= ---------------------------------
R
DC1
+ R
DC2
Z
RX
is connected from VRX to RSN. Z
T
is defined above, and G
42L
is the desired receive gain. Z
L
is the 2-wire load impedance.
R
DC1
, R
DC2
, and C
DC
form the network connected to the R
DC
pin.
R
DC1
and R
DC2
are approximately equal. I
LIMIT
is the desired loop
current in the constant-current region.
-
C
DC
= 1.5 ms
•
-------------------------------
R
DC1
+ R
DC2
R
DC1
•
R
DC2
(
RFA + 30.1 kΩ
)
GFA = 0.99
•
-------------------------------------------
(
RFA + 32 kΩ
)
(
RFA + 60 kΩ
)
-
RCL = 1.4
• (
R
DC1
+ R
DC2
) •
-----------------------------------------
(
RFA + 100 kΩ
)
365
-
= -------- ,
I
T
= 0.5 ms
---------------
-
R
D
and C
D
form the network connected from R
D
to AGND/DGND
and I
T
is the threshold current between on hook and off hook in the
Active state.
C
CAS
is the regulator filter capacitor and f
c
is the desired filter
cutoff frequency.
Standby loop current (resistive region).
R
D
C
D
R
D
1
C
CAS
= -----------------------------
-
5
3.4
•
10
πf
c
V
BAT1
– 3 V
-
I
S tan dby
= ----------------------------------
400
Ω
+ R
L
C
BSWEN
= 5
µmhos •
T
D
(
ms
)
C
BSWEN
is connected from BSWEN to GND for automatic
switching. T
D
is the delay in switching from BAT1 to BAT2. The
delay from BAT2 to BAT1 is about 0.1 T
D
.
10
Zarlink Semiconductor Inc.
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
