KESTX01
Rp = (Rs+ Rr)(Q
2
+ 1)
For example, Ls=40nH, fo=433MHz, (Rs+Rr)=2.2Ω,
Q=50, gives an equivalent parallel resistance of 5.4kΩ.
Typically the antenna will be d.c. referenced to V
CC
as
shown in the applications diagram. The maximum voltage
swing across the antenna is therefore limited by the RF
saturation voltage of the output PA stage. This is of the order
of 0.5V and hence the peak to peak voltage across the
antenna will be 2*(V
CC
–0.5V) e.g. 9V for V
CC
=5V. This means
that the maximum current that can be driven into the load is
1.7mA (peak–peak at the fundamental) and the external
power control resistor should be set accordingly.
If it is necessary to drive more power into the antenna a
possible way to accomplish this is to perform an impedance
transformation to the antenna.
The antenna also acts as a filter for unwanted, out of band,
harmonic spurii. The use of a balanced output suppresses the
2nd harmonic (and other even order harmonics). The 3rd
harmonic of the fundamental is not automatically suppressed.
However even a Q as low as 10 will reduce the 3rd harmonic
by a further 32dB relative to the fundamental.
Rr
Rs
Ct
Rp
Lant
Ct
Lant
Figure 5 Loop antenna
VCC
C4
C5
1
VEE1
VEE1
C2
2
3
4
C3
POWER UP
VCC
5
6
7
14
R1
13
12
11
C1
10
9
8
VCCPA
VEE2
R2
L1
ASK MODULATION
L2
ANTENNA
X1
Figure 6 Application diagram
Note: The above application diagram is provided to assist the customer in using the IC and no guarantee can be made as to
its correctness.
6
ZARLINK [ ZARLINK SEMICONDUCTOR INC ]
